Colin Percival
b2ba4131b9
When interrupt vectors are first allocated, they get assigned to CPU #0; at SI_SUB_SMP / SI_ORDER_SECOND (aka once we have multiple CPUs), the intr_irq_shuffle SYSINIT clears their CPU sets with the effect of forcing them to be assigned to new CPUs later. In case where interrupt vectors were allocated *but not yet bound* this code did not run, with the effect that those interrupts would remain pinned to CPU #0 forever. This affected the ena(4) driver, which allocates interrupts for I/O when the device is attached but doesn't set them up until the interface is brought up much later in the boot process (and, crucially, long after intr_irq_shuffle runs). Adjust intr_irq_shuffle to clear the CPU set for an interrupt source even if it currently has no handlers, so that it will be properly assigned to a CPU when it is used later. Reviewed by: andrew, mhorne MFC after: 1 month Sponsored by: Amazon Differential Revision: https://reviews.freebsd.org/D55284
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