r323474:
Add a default implementation that returns ENODEV for start, repeat_start,
stop, read, and write methods. Some controllers don't implement these
individual operations and have only a transfer method. In that case, we
should return an indication that the device is present but doesn't support
the method, as opposed to the kobj default error ENXIO which makes it
look like the whole device is missing. Userland tools such as i2c(8) can
use the differing return values to switch between the two different i2c
IO mechanisms.
r323553:
Defer attaching and probing iicbus and its children until interrupts are
available, in i2c controller drivers that require interrupts for transfers.
This is the result of auditing all 22 existing drivers that attach iicbus.
These drivers were the only ones remaining that require interrupts and were
not using config_intrhook to defer attachment. That has led, over the
years, to various i2c slave device drivers needing to use config_intrhook
themselves rather than performing bus transactions in their probe() and
attach() methods, just in case they were attached too early.
r323691:
Give icee(4) a detach() method so it can be used as a module. Add a
module makefile for it.
r323132:
The latest RPi firmware leaves secondary cores in a wait-for-event (WFE)
state to save power, so after writing the entry point address for a core to
the mailbox, use a dsb() to synchronize the execution pipeline to the data
written, then use an sev() to wake up the core.
Submitted by: Sylvain Garrigues <[email protected]>
r323133:
Change leading spaces to tabs, no functional change.
r321938:
Fix the interface to imx_iomux_gpr_get/set(). The functions were defined
as taking a register number, and that would get multiplied by 4 to make
a register address. But the header file that consumers have to reference
this stuff publishes register addresses, not numbers. So now everything
works in terms of register addresses.
Note that the HDMI init code was writing into the wrong register before
this change. Apparently whatever it wrote to was harmless, and apparently
HDMI was working because uboot had set up the right bits.
r322015:
Add an ahci driver for imx6.
This was submitted by Rogiel Sulzbach (thank you!) but has a few last-minute
changes by me, mostly where the code interfaces to my still-utterly-deficient
imx6_ccm clocks implementation. So blame me for any mistakes.
Submitted by: Rogiel Sulzbach <[email protected]>
Differential Revision: https://reviews.freebsd.org/D11177
r321791-r321792, r321795, r321798, r321821, r321823, r321826,
r321828, r321841, r321934, r322025-r322026, r322282, r322431,
r322473, r322475-r322479
Lots of i2c RTC driver stuff...
r321708:
Replace the pcf8563 i2c RTC driver with a new nxprtc driver which handles
all the chips in the NXP PCA212x and PCA/PCF85xx series. In addition to
supporting more chips, this driver uses the countdown timer on the chips as
a fractional seconds counter, giving it a resolution of about 15 milliseconds.
r321709:
Fix building this driver on non-FDT platforms.
r321710:
Add a few missing i2c devices that build fine on all arches.
r321711:
Move the device descriptions onto the device lines, so they cut and paste
nicely into other config files.
r321712:
Add the i2c RTC drivers found on various arm systems.
r321721:
Switch from using iic_transfer() to iicdev_readfrom/writeto(), mostly so
that transfers will be done with proper ownership of the bus. No
behavioral changes.
r321726:
Bugfixes and enhancements...
Don't enable the oscillator when it is found to be stopped at init time,
just let the first setting of valid time start it. But still report a dead
battery if it's stopped at init time.
Don't force the chip into 24hr mode, just cope with whatever mode it is
already in.
Align the RTC clock to top of second when setting it.
r321727:
Fix AM/PM mode handling. The bits to mask off in the hours register changes
between 12/24 hour mode. Also fix conversion between 12 and 24 hour mode.
It's not as easy as adding/subtracting 12, because the clock doesn't roll
over 11->0, it rolls over 12->1; 0 isn't a valid hour in AM/PM mode.
r321746:
Use the new clock_schedule() to arrange for clock_settime() to be called
at the right time to keep the RTC hardware time in sync, instead of using
pause_sbt() to sleep until the right time.
r321751:
Remove now-unused variable.
r321791:
Switch from using iic_transfer() to iicdev_readfrom/writeto(), mostly so
that transfers will be done with proper ownership of the bus. No
behavioral changes. Also add a detach() method.
r321792:
Add a detach() method.
r321795:
Check the clock-halted flag every time the clock is read, not just once
at startup. The flag stays set until the clock is loaded with good time,
so we need to keep saying the time is invalid until that happens.
r321798:
Restore a few rather important lines of code that got fumbled in r321746.
r321821:
No need to call getnanotime() now that the waiting is done by the central
subr_rtc code, switch from CLOCKF_SETTIME_NO_TS to CLOCKF_SETTIME_NO_ADJ
so that we get fed a timestamp, but it's not adjusted to compensate for
inaccuracy in setting time.
r321823:
Bugfixes and enhancements...
Don't enable the oscillator when it is found to be stopped at init time,
just let the first setting of valid time start it. But still report a dead
battery if it's stopped at init time.
Don't force the chip into 24hr mode, just cope with whatever mode it is
already in.
Schedule the clock_settime() callbacks to align the RTC clock to top of
second when setting it.
r321826:
Restructure the SUBDIR list as 1-per-line and alphabetize, so it will be
easier to add new things (and see what changed) in the future.
r321828:
Build iicbus/{ds1307,ds3231,nxprtc} as modules.
r321841:
Add a driver for the Intersil ISL12xx family of i2c RTC chips.
Supports ISL1209, ISL1218, ISL1219, ISL1220, ISL1221 (just basic RTC
functionality, not all the other fancy stuff the chips can do).
r321934:
Add missing ofw_bus_if.h src file.
r322025:
Switch to iicdev_readfrom/writeto() to do xfers with proper bus ownership.
Tested by: manu@
r322026:
Add missing header file to SRCS.
Reported by: manu@
r322282:
Remove the ds133x and s35390a i2c RTC drivers for now. They both do i2c
transfers in their probe() or attach() routines, and that doesn't work
when the low-level controller requires interrupts to be functional.
The DS133x family of chips is nearly identical to the DS1307 and support
for them should be added to that driver, then the ds133x driver can be
deleted. The s35390a driver just needs a non-trivial workover. In both
cases that work will be done and committed separately.
r322431:
Bid for the device with BUS_PROBE_GENERIC, because this is very much a
generic driver with minimal feature support for a large number of chips.
More featureful per-chip drivers might exist (especially out-of-tree) and
those should win the bidding even if they use BUS_PROBE_DEFAULT.
r322473:
Add a new driver, ds13rtc, that handles all DS13xx series i2c RTC chips.
This driver supports only basic timekeeping functionality. It completely
replaces the ds133x driver. It can also replace the ds1374 driver, but that
will take a few other changes in MIPS code and config, and will be committed
separately. It does NOT replace the existing ds1307 driver, which provides
access to some of the extended features on the 1307 chip, such as controlling
the square wave output signal. If both ds1307 and ds13rtc drivers are
present, the ds1307 driver will outbid and win control of the device.
This driver can be configured with FDT data, or by using hints on non-FDT
systems. In addition to the standard hints for i2c devices, it requires
a "chiptype" string of the form "dallas,ds13xx" where 'xx' is the chip id
(i.e., the same format as FDT compat strings).
r322475:
Change "chiptype" to "compatible". Making the hint name the same as the FDT
property name should make it easier to document the list of names accepted
by both configuration mechanisms.
r322476:
Remove the old ds1374 driver and use the ds13rtc driver instead. Adjust
several mips config files accordingly.
r322477:
Minor fixes and enhancements for the s35390a i2c RTC driver...
- Add FDT probe code.
- Do i2c transfers with exclusive bus ownership.
- Use config_intrhook_oneshot() to defer chip setup because some i2c
busses can't do transfers without interrupts.
- Add a detach() routine.
- Add to module build.
r322478:
Add back the drivers for Dallas/Maxim ds13xx and Seiko S35390x now that
they've been rewritten/fixed to not cause panics by doing i2c transfers
before interrupts are available.
PR: 221227
r322479:
Add hinted attachment for non-FDT systems. Also, print a message if
setting up the timer fails, because on some types of chips that's the
first attempt to access the device. If the chip is missing/non-responsive
then you'd get a driver that attached and didn't register the rtc, with
no clue about why. On other chip types there are inits that come before
timer setup, and they already print messages about errors.
Support the "disable-over-current" property for imx ehci controllers.
It turns out that this is more than a power optization. The OTG port
won't work on boards that have this property unless this setting is honored.
Also ensure that the usb phy device attaches before ehci.
Put an #ifdef notyet wrapper around a function that's not being used yet,
to avoid compile warnings.
Add a driver for the imx6 on-chip realtime clock (snvs).
The imx6_snvs driver is not strictly required for the system to run, so
change it from standard to optional and add a device statement for it so
that it's included unless someone uses nodevice to eliminate it.
If an i2c transfer ends due to error, issue a stop on the bus even if the
nostop option is set, if a start was issued.
Add iic_recover_bus(), a helper function that can be used by any i2c driver
which is able to manipulate the clock and data lines directly.
When an i2c bus is hung by a slave device stuck in the middle of a
transaction that didn't complete properly, this function manipulates the
clock and data lines in a sequence known to reliably reset slave devices.
The most common cause of a hung i2c bus is a system reboot in the middle of
an i2c transfer (so it doesnt' happen often, but now there is a way other
than power cycling to recover from it).
Add bus recovery handling to the imx5/imx6 i2c driver.
Add a driver for the imx6 EPIT timer that can be used as the system
timecounter instead of the GPT timer, freeing up the more flexible GPT
hardware for other uses. The EPIT driver is a standard (always in the
kernel) driver, and the existing GPT driver is now optional and included
only if you ask for device imx_gpt.
Add imx6ul support (applies to all files).
Add code/constants for detecting imx6ul (ultralite) chips, a species of
imx6 based on a single cortex-a7 core. Other changes to imx6 drivers
and support code are needed to fully support the imx6ul.
if_ffec: Add imx6ul SoC support, and get the PHY number from the FDT data.
If there is no phy-handle property, fall back to using MII_PHY_ANY.
This still doesn't support an mdio bus with multiple PHYs on it, or the
possibility that the PHY being used by this instance of ffec is on the
mdio bus of some other instance (which is now a possibility with imx6ul).
Adding that support will require changes in fdt_get_phyaddr(), which is
currently making some assumptions that don't work with modern fdt data.
Eliminate unnecessary read/modify/write sequences during eventtimer setup.
Replace the hard-coded way-too-small minimum event timer period with a value
calculated at runtime based on how long it takes to set up an event in
hardware. This fixes the intermittant 1-minute hang at boot on imx5
systems, and also the occasional oversleeping while running. It doesn't
affect imx6 systems, which use different hardware for eventtimers.
Remove some old interrupt handling workaround code from the pre-INTRNG days.
At this point, INTRNG is not going away (the option may go away, but the
code is not), so we no longer need code to support workarounds that handled
the lack of INTRNG functionality.
Update the code that compensates for the lack of a GPC interrupt controller
driver for imx6. Some newer dts source puts the GIC node at the root
instead of under /soc, so look in both places. Also, sometimes the GIC
node doesn't list itself as its own interrupt-parent, allow that too.
Convert the imx5 interrupt controller driver to INTRNG.
Add INTRNG option to EFIKA_MX config, it is an imx5-based platform.
Delete our local imx53-qsb.dts file; the code now runs fine using the
standard vendor-supplied file in sys/gnu/dts/arm.
Add a module to build imx5 dtb files.
Add dtb/imx5 module build to the IMX53 kernel config.
Remove configs for IMX53-QSB and DIGI-CCWMX53. They were just
standard IMX53 with static dtb added, and now that imx53 can use vendor-
supplied dts files and ubldr, there is no need for a static-dtb variant.
Make the imx5 clocks driver work with vendor-supplied dts (which does not
supply the addresses for the DPLL register blocks) by hard-coding the
addresses in the driver source code. Yes, this is just as bad an idea as
it sounds, but we have no choice.
Remove hardcoded bootverbose=1; imx53 systems boot using loader(8) and
users can set verbose if they want to.
The arm kernel linker scripts place the .init_pagetable section in .bss,
but .init_pagetable had no section flags set, and so did not match the
expected flags for .bss.
GNU ld silently ignores this case, but lld reports an error:
ld: error: incompatible section flags for .bss
>>> locore.o:(.init_pagetable): 0x0
>>> output section .bss: 0x3
PR: 220055
Sponsored by: The FreeBSD Foundation
In arm_gicv2m_alloc_msi(), if we found a suitable irq range, leave the loop
before we increase irq again, or we'd end up choosing an irq, and then
really using the next one, even if it's not available.
Also in the inner loop, correct the end check so that we check every irq,
even the last one.
This makes the msk(4) adapter able to use MSI on Softiron Overdrive 1000.
PR: 219956
Approved by: re (gjb)
Avoid use of contiguous memory allocations in busdma when possible.
This patch improves the boundary checks in busdma to allow more cases
using the regular page based kernel memory allocator. Especially in
the case of having a non-zero boundary in the parent DMA tag. For
example AMD64 based platforms set the PCI DMA tag boundary to
PCI_DMA_BOUNDARY, 4GB, which before this patch caused contiguous
memory allocations to be preferred when allocating more than PAGE_SIZE
bytes. Even if the required alignment was less than PAGE_SIZE bytes.
This patch also fixes the nsegments check for using kmem_alloc_attr()
when the maximum segment size is less than PAGE_SIZE bytes.
Updated some comments describing the code in question.
Differential Revision: https://reviews.freebsd.org/D10645
Reviewed by: kib, jhb, gallatin, scottl
Sponsored by: Mellanox Technologies
r318021:
Introduce pmap_remap_vm_attr(), it allows to remap one VM memattr class to
another.
r318251:
Clarify usage rules for pmap_remap_vm_attr(). Not a functional change.
r315845, 315430, r317981, r315466
o Fix some overly long lines, whitespace and other bugs according to
style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4).
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method,
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.
o Trim/adjust includes.
o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4).
o Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)
Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.
CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.
o Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications.
o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter have been added to ports as sysutils/mmc-utils.
Among others, the `mmc` tool of mmc-utils allows for partitioning
eMMC devices (tested working).
o For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.
o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.
o In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC
controllers as such in order to match the PCI one.
Additionally, in the entry for the 80860F14 SDXC controller remove
the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET.
[qemu] Fix VERSATILEPB kernel boot in QEMU broken by r300968
QEMU does not implement hardware debug registers so when
dbg_monitor_is_enabled is called kernel receives "invalid instruction"
exception. QEMU implements only DIDR register and on read returns all
zeroes to indicate that it doesn't support other registers. Real
hardware has Version bits set.
r308424:
Fix locking in bcm2835_audio driver
- Move all VCHI activity to worker thread: channel methods are called with
non-sleepable lock held and VCHI uses sleepable lock.
- In worker thread use sx(9) lock instead of mutex(9) for the same reason.
PR: 213801, 205979
r310636:
[rpi] Fix bcm2835_audio locking and samples starvation
Rework general approach to locking and working with audio worker thread:
- Use flags to signal requested worker action
- Fix submitted buffer calculations to avoid samples starvation
- Protect buffer pointers with locks to fix race condition between callback
and audio worker thread
- Remove unnecessary vchi_service_use
- Do not use lock to serialize VCHI requests since only one thread issues them now
- Fix unloading signaling per hselasky@ suggestion
- Add output to detect inconsistent callback data caused by possible firmware bug
https://github.com/raspberrypi/firmware/issues/696
- Add stats/debug sysctls to troubleshoot possible bugs
PR: 213687, 205979, 215194
r308569:
Always call PHYS_TO_VM_PAGE() in is_managed(). Fast road for addresses
under first_page cannot be taken as this variable is connected only to
vm_page_array segment. There could be more segments in system like the ones
for various fictitious page ranges. These can be situated under
vm_page_array segment and so, they could be skipped before this fix.
However, as far as I know, there is no report associated with it.
r308570:
The return type of is_managed() was changed from boolean_t to bool type in
r308569. Now, propagate this change further for consistency sake.
Fixes for NVIDIA Tegra124 clocks:
- EMC clock have standard peripheral clock block. Use it. - Implement full
frequency set method for PLLD2. This PLL
is used as HDMI pixel clock so we must be able to set it to wide range of
frequencies, within 5% tolerance allowed by HDMI specification. Due to
this, full state space search (over m, n, p fields) is necessary.
r308286:
TEGRA: Add basic driver for memory controller. For now, it only reports
memory and SMMU access errors.
r308287:
TEGRA: Fix numerous issues in clock code. Define and export clocks related
to XUSB driver.
r306442:
TEGRA: Add support for MULTIDELAY option.
r306444:
TEGRA: Don't include files already included by system or arch configs.
r306445:
TEGRA: Return back kern_clocksource.c into tegra config file. It was
removed in r306444 by mistake.
r306550:
TEGRA: Extend timeout for PLLs lock to 5 ms. Real lock time for PLLA has
been very near to old limit.
r315900:
Cleanup structures related to VFP and/or mcontext_t. - in mcontext_t,
rename newer used 'union __vfp' to equaly sized 'mc_spare'.
Space allocated by 'union __vfp' is too small and cannot hold full VFP
context.
- move structures defined in fp.h to more appropriate headers. - remove
all unused VFP structures.
r315973:
Save VFP state on fork(). Update the copy of VFP state in PCB before it is
cloned for new process.
r315974:
Preserve VFP state across signal delivery.
r303261:
Add more UEFI/e820 memory types from latest specifications.
r315059:
Split overbloated machep.c to multiple files and do basic cleanup of these
fragments.
r306631:
Use C99 designated initializers to create the armv6 cpu_functions structs.
This will help with a later cleanup of what functions we implement.
r306640:
Only define the CF_* macros on ARMv4/v5. They are unused on armv6.
r306641:
Remove the parts of cpu_functions from armv6 that are unused on that
architecture.
r306650:
Add the Cortex-A{53,57,72} ID register values. These can all run 32-bit
code so could run a 32-bit kernel.
r306656:
Use the cortex functions when booting on one of the Cortex-A ARMv8 CPUs.
This list is incomplete, however we don't have the ID values for the
missing Cortex-A32 or A35.
MFC r315701 (by ed):
Set the interpreter path to /nonexistent.
MFC r315749:
Adjust r314851 to not require every brand to specify interpreter path.
MFC r315753:
Add a flag BI_BRAND_ONLY_STATIC to specify that the brand only
matches static binaries.
MFC r315754:
Update r315753 with the proper flag name.
MFC r316211:
A followup to r315749, two more places where brand->interp_path was
accessed unconditionally.
MFC r312353, r312354 and r312355:
Sync in the latest CloudABI generated source files.
Languages like C++17 and Go provide direct support for slice types:
pointer/length pairs. The CloudABI generator now has more complete for
this, meaning that for the C binding, pointer/length pairs now use an
automatic naming scheme of ${name} and ${name}_len.
Apart from this change and some reformatting, the ABI definitions are
identical. Binary compatibility is preserved entirely.
MFC r315700:
Make file descriptor passing work for CloudABI's sendmsg().
Reduce the potential amount of code duplication between cloudabi32 and
cloudabi64 by creating a cloudabi_sock_recv() utility function. The
cloudabi32 and cloudabi64 modules will then only contain code to convert
the iovecs to the native pointer size.
In cloudabi_sock_recv(), we can now construct an SCM_RIGHTS cmsghdr in
an mbuf and pass that on to kern_sendit().
MFC r315736:
Make file descriptor passing for CloudABI's recvmsg() work.
Similar to the change for sendmsg(), create a pointer size independent
implementation of recvmsg() and let cloudabi32 and cloudabi64 call into
it. In case userspace requests one or more file descriptors, call
kern_recvit() in such a way that we get the control message headers in
an mbuf. Iterate over all of the headers and copy the file descriptors
to userspace.
(by cognet)
Use strexeq instead of needlessly branch.
==
(by cognet)
Remove useless labels.
==
(by cognet)
Correct the IT instruction in atomic_fcmpset_64().
==
(by andrew)
Only define atomic_fcmpset_long in the kernel. We may include
machine/atomic.h in userspace, however atomic_fcmpset_32 is unimplemented
there.
r313254,r313341
amd64: add atomic_fcmpset
==
sparc64: add atomic_fcmpset
==
Implement atomic_fcmpset_* for arm and arm64.
==
Add atomic_fcmpset_*() inlines for powerpc
Summary:
atomic_fcmpset_*() is analogous to atomic_cmpset(), but saves off the read value
from the target memory location into the 'old' pointer in the case of failure.
==
i386: add atomic_fcmpset
==
Don't retry a lost reservation in atomic_fcmpset()
The desired behavior of atomic_fcmpset_() is to always exit on error. Instead
of retrying on lost reservation, leave the retry to the caller, and return
==
Add atomic_fcmpset_*() inlines for MIPS
atomic_fcmpset_*() is analogous to atomic_cmpset(), but saves off the
read value from the target memory location into the 'old' pointer.
==
i386: fixup fcmpset
An incorrect output specifier was used which worked with clang by accident,
but breaks with the in-tree gcc version.
While here plug a whitespace nit.
==
Implement atomic_fcmpset_*() for RISC-V.
==
Use 64bit store instruction in atomic_fcmpset_64.
Handle imx6 erratum ERR004346... to reboot, clear the SRS bit twice within
the same cycle of the 32khz clock.
I've never actually noticed this error happening, but it's an easy fix.
Stop including sys/types.h from arm's machine/atomic.h, fix the places
where atomic.h was being included without ensuring that types.h (via
param.h) was included first, as required by atomic(9).
Remove arm's cpuconf.h, and references to it, after moving a few lines from
it into pmap-v4.h where they are used. Other than those few lines of
support for different MMU types, nothing in cpuconf.h has been used in our
code for quite a while.
The file existed to set up a variety of symbols to describe the
architecture. Over the past few years we have converted all of our source
to use the new architecture symbols standardized by ARM Inc, and predefined
by both clang and gcc.
Ian Lepore