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Merge commit 26bf39cdba0b from llvm-project (by Jessica Clarke):
[ELF][PowerPC] Don't assume TOC pointer is valid in IPLT entries (#207555) Unlike normal PLT entries, IPLT entries can be called indirectly even when in PIEs/DSOs, and so there's no guarantee on what's in the TOC pointer register at that time. Therefore we must emit variants of the existing code that work without it, whether r12-relative (playing the same role as MIPS's $25) in the same number of instructions, or first retrieving PC in an i386-like manner, being careful not to clobber LR. On 32-bit PowerPC even direct calls to IPLT entries face the same issue, since we'd use the TOC base of the resolver, which may not be the same as the caller, even within the same object. Normal canonical PLTs still look broken on 64-bit PowerPC as they use the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs. We should probably treat these cases the same as PIE on i386 (except including PDEs for 64-bit PowerPC), where it's an error due to the use of %ebx in PLT entries. Bump LLD_FREEBSD_VERSION for this fix as otherwise an existing system linker will be deemed new enough to use and produce broken kernels for TARGET=powerpc (regardless of TARGET_ARCH/MACHINE/MACHINE_ARCH) builds. PR: 294369 MFC after: 1 week
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Jessica Clarke committed
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@@ -77,7 +77,7 @@ void elf::writePPC32GlinkSection(Ctx &ctx, uint8_t *buf, size_t numEntries) {
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if (!ctx.arg.isPic) {
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for (const Symbol *sym :
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cast<PPC32GlinkSection>(*ctx.in.plt).canonical_plts) {
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writePPC32PltCallStub(ctx, buf, sym->getGotPltVA(ctx), nullptr, 0);
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writePPC32PltCallStub(ctx, buf, glink, sym->getGotPltVA(ctx), nullptr, 0);
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buf += 16;
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glink += 16;
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}
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@@ -165,7 +165,7 @@ PPC::PPC(Ctx &ctx) : TargetInfo(ctx) {
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gotPltHeaderEntriesNum = 0;
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pltHeaderSize = 0;
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pltEntrySize = 4;
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ipltEntrySize = 16;
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ipltEntrySize = ctx.arg.isPic ? 32 : 16;
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needsThunks = true;
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@@ -180,10 +180,11 @@ PPC::PPC(Ctx &ctx) : TargetInfo(ctx) {
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}
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void PPC::writeIplt(uint8_t *buf, const Symbol &sym,
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uint64_t /*pltEntryAddr*/) const {
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// In -pie or -shared mode, assume r30 points to .got2+0x8000, and use a
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// .got2.plt_pic32. thunk.
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writePPC32PltCallStub(ctx, buf, sym.getGotPltVA(ctx), sym.file, 0x8000);
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uint64_t pltEntryAddr) const {
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// In -pie or -shared mode we can't rely on r30 for indirect calls, nor for
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// direct calls with a different TOC base to the resolver.
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writePPC32PltCallStub(ctx, buf, pltEntryAddr, sym.getGotPltVA(ctx), sym.file,
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std::nullopt);
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}
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void PPC::writeGotHeader(uint8_t *buf) const {
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@@ -1167,8 +1167,9 @@ void PPC64::writePlt(uint8_t *buf, const Symbol &sym,
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}
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void PPC64::writeIplt(uint8_t *buf, const Symbol &sym,
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uint64_t /*pltEntryAddr*/) const {
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writePPC64LoadAndBranch(ctx, buf, sym.getGotPltVA(ctx));
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uint64_t pltEntryAddr) const {
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writePPC64LoadAndBranch(ctx, buf, pltEntryAddr, sym.getGotPltVA(ctx),
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/*toc=*/false);
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}
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static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {
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@@ -1316,8 +1316,9 @@ InputSection *MicroMipsR6Thunk::getTargetInputSection() const {
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return dyn_cast<InputSection>(dr.section);
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}
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void elf::writePPC32PltCallStub(Ctx &ctx, uint8_t *buf, uint64_t gotPltVA,
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const InputFile *file, int64_t addend) {
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void elf::writePPC32PltCallStub(Ctx &ctx, uint8_t *buf, uint64_t p,
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uint64_t gotPltVA, const InputFile *file,
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std::optional<int64_t> addend) {
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if (!ctx.arg.isPic) {
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write32(ctx, buf + 0, 0x3d600000 | (gotPltVA + 0x8000) >> 16); // lis r11,ha
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write32(ctx, buf + 4, 0x816b0000 | (uint16_t)gotPltVA); // lwz r11,l(r11)
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@@ -1326,34 +1327,52 @@ void elf::writePPC32PltCallStub(Ctx &ctx, uint8_t *buf, uint64_t gotPltVA,
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return;
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}
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uint32_t offset;
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if (addend >= 0x8000) {
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uint32_t reg;
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uint64_t written = 0;
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if (!addend) {
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// We're a (position-independent) IPLT entry, so cannot assume anything
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// about what value the caller left in r30 as this could be an indirect
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// call.
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write32(ctx, buf + 0, 0x7c0802a6); // mflr r0
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write32(ctx, buf + 4, 0x429f0005); // bcl 20, 31, 1f
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write32(ctx, buf + 8, 0x7d6802a6); // 1: mflr r11
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write32(ctx, buf + 12, 0x7c0803a6); // mtlr r0
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offset = gotPltVA - p - 8;
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reg = 11;
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written = 16;
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} else if (*addend >= 0x8000) {
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// The stub loads an address relative to r30 (.got2+Addend). Addend is
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// almost always 0x8000. The address of .got2 is different in another object
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// file, so a stub cannot be shared.
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reg = 30;
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offset = gotPltVA -
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(ctx.in.ppc32Got2->getParent()->getVA() +
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(file->ppc32Got2 ? file->ppc32Got2->outSecOff : 0) + addend);
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(file->ppc32Got2 ? file->ppc32Got2->outSecOff : 0) + *addend);
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} else {
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// The stub loads an address relative to _GLOBAL_OFFSET_TABLE_ (which is
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// currently the address of .got).
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reg = 30;
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offset = gotPltVA - ctx.in.got->getVA();
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}
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uint16_t ha = (offset + 0x8000) >> 16, l = (uint16_t)offset;
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if (ha == 0) {
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write32(ctx, buf + 0, 0x817e0000 | l); // lwz r11,l(r30)
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write32(ctx, buf + 4, 0x7d6903a6); // mtctr r11
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write32(ctx, buf + 8, 0x4e800420); // bctr
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write32(ctx, buf + 12, 0x60000000); // nop
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write32(ctx, buf + written + 0,
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0x81600000 | (reg << 16) | l); // lwz r11,l(r[11|30])
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write32(ctx, buf + written + 4, 0x7d6903a6); // mtctr r11
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write32(ctx, buf + written + 8, 0x4e800420); // bctr
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write32(ctx, buf + written + 12, 0x60000000); // nop
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} else {
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write32(ctx, buf + 0, 0x3d7e0000 | ha); // addis r11,r30,ha
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write32(ctx, buf + 4, 0x816b0000 | l); // lwz r11,l(r11)
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write32(ctx, buf + 8, 0x7d6903a6); // mtctr r11
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write32(ctx, buf + 12, 0x4e800420); // bctr
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write32(ctx, buf + written + 0,
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0x3d600000 | (reg << 16) | ha); // addis r11,r[11|30],ha
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write32(ctx, buf + written + 4, 0x816b0000 | l); // lwz r11,l(r11)
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write32(ctx, buf + written + 8, 0x7d6903a6); // mtctr r11
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write32(ctx, buf + written + 12, 0x4e800420); // bctr
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}
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}
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void PPC32PltCallStub::writeTo(uint8_t *buf) {
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writePPC32PltCallStub(ctx, buf, destination.getGotPltVA(ctx), file, addend);
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writePPC32PltCallStub(ctx, buf, getThunkTargetSym()->getVA(ctx),
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destination.getGotPltVA(ctx), file, addend);
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}
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void PPC32PltCallStub::addSymbols(ThunkSection &isec) {
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@@ -1402,12 +1421,22 @@ void PPC32LongThunk::writeTo(uint8_t *buf) {
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write32(ctx, buf + 4, 0x4e800420); // bctr
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}
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void elf::writePPC64LoadAndBranch(Ctx &ctx, uint8_t *buf, uint64_t addr) {
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uint64_t offset = addr - getPPC64TocBase(ctx);
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void elf::writePPC64LoadAndBranch(Ctx &ctx, uint8_t *buf, uint64_t p,
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uint64_t addr, bool toc) {
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uint64_t offset;
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uint32_t reg;
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if (toc) {
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offset = addr - getPPC64TocBase(ctx);
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reg = 2;
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} else {
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offset = addr - p;
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reg = 12;
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}
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uint16_t offHa = (offset + 0x8000) >> 16;
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uint16_t offLo = offset & 0xffff;
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write32(ctx, buf + 0, 0x3d820000 | offHa); // addis r12, r2, OffHa
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write32(ctx, buf + 0,
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0x3d800000 | (reg << 16) | offHa); // addis r12, r[2|12], OffHa
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write32(ctx, buf + 4, 0xe98c0000 | offLo); // ld r12, OffLo(r12)
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write32(ctx, buf + 8, 0x7d8903a6); // mtctr r12
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write32(ctx, buf + 12, 0x4e800420); // bctr
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@@ -1416,7 +1445,8 @@ void elf::writePPC64LoadAndBranch(Ctx &ctx, uint8_t *buf, uint64_t addr) {
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void PPC64PltCallStub::writeTo(uint8_t *buf) {
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// Save the TOC pointer to the save-slot reserved in the call frame.
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write32(ctx, buf + 0, 0xf8410018); // std r2,24(r1)
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writePPC64LoadAndBranch(ctx, buf + 4, destination.getGotPltVA(ctx));
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writePPC64LoadAndBranch(ctx, buf + 4, getThunkTargetSym()->getVA(ctx) + 4,
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destination.getGotPltVA(ctx));
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}
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void PPC64PltCallStub::addSymbols(ThunkSection &isec) {
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@@ -1458,7 +1488,8 @@ void PPC64R2SaveStub::writeTo(uint8_t *buf) {
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ctx.in.ppc64LongBranchTarget->addEntry(&destination, addend);
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const uint64_t addr =
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ctx.in.ppc64LongBranchTarget->getEntryVA(&destination, addend);
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writePPC64LoadAndBranch(ctx, buf + 4, addr);
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writePPC64LoadAndBranch(ctx, buf + 4, getThunkTargetSym()->getVA(ctx) + 4,
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addr);
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}
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}
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@@ -1520,7 +1551,7 @@ bool PPC64R12SetupStub::isCompatibleWith(const InputSection &isec,
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void PPC64LongBranchThunk::writeTo(uint8_t *buf) {
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uint64_t addr =
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ctx.in.ppc64LongBranchTarget->getEntryVA(&destination, addend);
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writePPC64LoadAndBranch(ctx, buf, addr);
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writePPC64LoadAndBranch(ctx, buf, getThunkTargetSym()->getVA(ctx), addr);
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}
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void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) {
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@@ -83,9 +83,12 @@ std::unique_ptr<Thunk> addThunk(Ctx &, const InputSection &isec,
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// are restricted.
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std::unique_ptr<Thunk> addLandingPadThunk(Ctx &, Symbol &s, int64_t a);
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void writePPC32PltCallStub(Ctx &, uint8_t *buf, uint64_t gotPltVA,
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const InputFile *file, int64_t addend);
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void writePPC64LoadAndBranch(Ctx &, uint8_t *buf, uint64_t addr);
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// Call with addend as nullopt for an IPLT entry with no valid TOC pointer
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void writePPC32PltCallStub(Ctx &, uint8_t *buf, uint64_t p, uint64_t gotPltVA,
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const InputFile *file,
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std::optional<int64_t> addend);
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void writePPC64LoadAndBranch(Ctx &, uint8_t *buf, uint64_t p, uint64_t addr,
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bool toc = true);
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} // namespace lld::elf
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@@ -1,4 +1,4 @@
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// Local identifier in __FreeBSD_version style
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#define LLD_FREEBSD_VERSION 1600000
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#define LLD_FREEBSD_VERSION 1600001
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#define LLD_VERSION_STRING "21.1.8 (FreeBSD llvmorg-21.1.8-0-g2078da43e25a-" __XSTRING(LLD_FREEBSD_VERSION) ")"
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