amd64/*sigtramp.S: re-enable some cfi annotations for special registers

Also explicitly specify .cfi_sections to emit the cfi bytecode into the
loadable .eh_frame section.

Reviewed by:	mchoo
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D59838
This commit is contained in:
Konstantin Belousov committed 2026-09-21 21:25:38 +03:00
1 parent 1b9aea382e
commit 64a73d1b6d
2 files changed
+40 -23

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+27 -17
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@@ -34,6 +34,25 @@
#include "assym.inc"
/*
* Historical notes. Keep it for now if problems with older versions
* of toolchains reappear.
*
* Gnu as complains about %fs/%gs/%es/%ds registers offsets not being
* multiple of 8, but gas + ld.bfd work for %cs/%ss.
*
* Clang IAS + ld.lld combination cannot handle any of the segment
* registers. Also, clang IAS does not know %rflags/%fs.base/%gs.base
* registers names, use dwarf registers numbers from psABI directly.
*
* LLVM libunwind from stable/13 cannot parse register numbers higher
* than 32. Disable %rflags, %fs.base, and %gs.base annotations.
*/
#if !defined(__clang__) || (__clang_major__ >= 17)
#define WORKING_CFI
#endif
.cfi_sections .eh_frame
.text
/*
* Signal trampoline, mapped as vdso into shared page.
@@ -57,33 +76,24 @@ ENTRY(__vdso_sigcode)
.cfi_offset %r13, SIGF_UC + UC_R13
.cfi_offset %r14, SIGF_UC + UC_R14
.cfi_offset %r15, SIGF_UC + UC_R15
#if 0
/*
* Gnu as complains about %fs/%gs/%es/%ds registers offsets not being
* multiple of 8, but gas + ld.bfd work for %cs/%ss.
*
* Clang IAS + ld.lld combination cannot handle any of the segment
* registers. Also, clang IAS does not know %rflags/%fs.base/%gs.base
* registers names, use dwarf registers numbers from psABI directly.
*
* LLVM libunwind from stable/13 cannot parse register numbers higher
* than 32. Disable %rflags, %fs.base, and %gs.base annotations.
*/
#ifdef WORKING_CFI
#ifdef __clang__
.cfi_offset %fs, SIGF_UC + UC_FS
.cfi_offset %gs, SIGF_UC + UC_GS
.cfi_offset %es, SIGF_UC + UC_ES
.cfi_offset %ds, SIGF_UC + UC_DS
#endif
#endif
.cfi_offset %rip, SIGF_UC + UC_RIP
#if 0
#ifdef WORKING_CFI
.cfi_offset %cs, SIGF_UC + UC_CS
.cfi_offset 49 /* %rflags */, SIGF_UC + UC_RFLAGS
.cfi_offset %rflags, SIGF_UC + UC_RFLAGS
#endif
.cfi_offset %rsp, SIGF_UC + UC_RSP
#if 0
#ifdef WORKING_CFI
.cfi_offset %ss, SIGF_UC + UC_SS
.cfi_offset 58 /* %fs.base */, SIGF_UC + UC_FSBASE
.cfi_offset 59 /* %gs.base */, SIGF_UC + UC_GSBASE
.cfi_offset %fs.base, SIGF_UC + UC_FSBASE
.cfi_offset %gs.base, SIGF_UC + UC_GSBASE
#endif
call *SIGF_HANDLER(%rsp) /* call signal handler */
lea SIGF_UC(%rsp),%rdi /* get ucontext_t */
+13 -6
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@@ -34,6 +34,11 @@
#include "ia32_assym.h"
#if !defined(__clang__) || (__clang_major__ >= 17)
#define WORKING_CFI
#endif
.cfi_sections .eh_frame
.text
/*
* Signal trampoline, mapped as vdso into shared page, or copied to
@@ -45,7 +50,7 @@ __vdso_ia32_sigcode:
.cfi_startproc
.cfi_signal_frame
.cfi_def_cfa %esp, 0
#if 0
#ifdef WORKING_CFI
.cfi_offset %gs, IA32_SIGF_UC + IA32_UC_GS
.cfi_offset %fs, IA32_SIGF_UC + IA32_UC_FS
.cfi_offset %es, IA32_SIGF_UC + IA32_UC_ES
@@ -59,15 +64,17 @@ __vdso_ia32_sigcode:
.cfi_offset %ecx, IA32_SIGF_UC + IA32_UC_ECX
.cfi_offset %eax, IA32_SIGF_UC + IA32_UC_EAX
.cfi_offset %eip, IA32_SIGF_UC + IA32_UC_EIP
#if 0
#ifdef WORKING_CFI
.cfi_offset %cs, IA32_SIGF_UC + IA32_UC_CS
.cfi_offset %flags, IA32_SIGF_UC + IA32_UC_EFLAGS
.cfi_offset %eflags, IA32_SIGF_UC + IA32_UC_EFLAGS
#endif
.cfi_offset %esp, IA32_SIGF_UC + IA32_UC_ESP
#if 0
#ifdef WORKING_CFI
.cfi_offset %ss, IA32_SIGF_UC + IA32_UC_SS
.cfi_offset 93 /* %fs.base */, IA32_SIGF_UC + IA32_UC_FSBASE
.cfi_offset 94 /* %gs.base */, IA32_SIGF_UC + IA32_UC_GSBASE
#ifdef __clang__
.cfi_offset %fs.base, IA32_SIGF_UC + IA32_UC_FSBASE
.cfi_offset %gs.base, IA32_SIGF_UC + IA32_UC_GSBASE
#endif
#endif
calll *IA32_SIGF_HANDLER(%esp)
leal IA32_SIGF_UC(%esp),%eax /* get ucontext */