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rtwn: add support for the RTL8723BU
Pushed using the RTL8723BU. Reviewed by: ziaee, avos, adrian Relnotes: yes Differential Revision: https://reviews.freebsd.org/D59205
This commit is contained in:
Ahmad Khalifa committed
1 parent
b2fd2f9063
commit
551b7c5e12
28 files changed
+3162
-4
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@@ -19,7 +19,7 @@
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.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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.\"
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.Dd November 10, 2024
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.Dd September 1, 2026
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.Dt RTWN 4
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.Os
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.Sh NAME
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@@ -93,6 +93,8 @@ Realtek 802.11n wireless 8192c (RTL8192C)
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.It
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Realtek 802.11n wireless 8192e (RTL8192E)
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.It
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Realtek 802.11n wireless 8723b (RTL8723B)
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.It
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Realtek 802.11ac wireless 8812a (RTL8812A)
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.It
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Realtek 802.11ac wireless 8821a (RTL8821A)
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@@ -122,6 +124,7 @@ which are loaded when an interface is brought up:
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.It Pa /boot/kernel/rtwn-rtl8192cfwT.ko
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.It Pa /boot/kernel/rtwn-rtl8192cfwU.ko
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.It Pa /boot/kernel/rtwn-rtl8192eufw.ko
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.It Pa /boot/kernel/rtwn-rtl8723bufw.ko
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.It Pa /boot/kernel/rtwn-rtl8812aufw.ko
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.It Pa /boot/kernel/rtwn-rtl8821aufw.ko
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.El
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@@ -266,3 +269,6 @@ driver written by
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The
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.Nm
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driver currently does not implement firmware-based rate control.
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The RTL8723BU seems to depend on some firmware commands for antenna
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setup.
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Hence, it does not work without firmware.
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@@ -29,7 +29,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" THE POSSIBILITY OF SUCH DAMAGES.
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.\"
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.Dd November 10, 2024
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.Dd September 1, 2026
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.Dt RTWN_USB 4
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.Os
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.Sh NAME
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@@ -59,7 +59,7 @@ driver.
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The
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.Nm
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driver supports USB wireless network adapters based on certain
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Realtek RTL 8188/8192/8812 and 8821 chipsets, including:
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Realtek RTL 8188/8192/8723/8812 and 8821 chipsets, including:
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.Pp
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.Bl -column -compact "Belkin F7D1102 Surf Wireless Micro" "RTL8188CUS" "USB 2.0"
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.It Em Card Ta Em Chip Ta Em Bus
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@@ -97,6 +97,7 @@ Realtek RTL 8188/8192/8812 and 8821 chipsets, including:
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.It "Netgear WNA1000M" Ta RTL8188CUS Ta USB 2.0
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.It "Mercusys MW150US" Ta RTL8188EU Ta USB 2.0
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.It "Planex GW-900D" Ta RTL8812AU Ta USB 3.0
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.It "Realtek RTL8723BU" Ta RTL8723BU Ta USB 2.0
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.It "Realtek RTL8192CU" Ta RTL8192CU Ta USB 2.0
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.It "Realtek RTL8188CUS" Ta RTL8188CUS Ta USB 2.0
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.It "Sitecom WLA-7100" Ta RTL8812AU Ta USB 3.0
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@@ -2990,6 +2990,17 @@ dev/rtwn/rtl8192e/r92e_rom.c optional rtwn
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dev/rtwn/rtl8192e/r92e_rx.c optional rtwn
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dev/rtwn/rtl8192e/usb/r92eu_attach.c optional rtwn_usb
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dev/rtwn/rtl8192e/usb/r92eu_init.c optional rtwn_usb
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# RTL8723B
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dev/rtwn/rtl8723b/r23b_calib.c optional rtwn
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dev/rtwn/rtl8723b/r23b_fw.c optional rtwn
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dev/rtwn/rtl8723b/r23b_init.c optional rtwn
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dev/rtwn/rtl8723b/r23b_led.c optional rtwn
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dev/rtwn/rtl8723b/r23b_rf.c optional rtwn
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dev/rtwn/rtl8723b/r23b_rom.c optional rtwn
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dev/rtwn/rtl8723b/r23b_rx.c optional rtwn
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dev/rtwn/rtl8723b/usb/r23bu_attach.c optional rtwn_usb
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dev/rtwn/rtl8723b/usb/r23bu_init.c optional rtwn_usb
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dev/rtwn/rtl8723b/usb/r23bu_rom.c optional rtwn_usb
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# RTL8812A
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dev/rtwn/rtl8812a/r12a_beacon.c optional rtwn
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dev/rtwn/rtl8812a/r12a_calib.c optional rtwn
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@@ -0,0 +1,717 @@
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begin 644 rtwn-rtl8723bufw.fw.uu
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MD*'C\)"AU70.\)"AUW0!\)$ID*'8\.3_[\.>4!:1*2^1..#]=-DO]8+D-*'U
|
||||
M@^WP#X#E>P%ZH7G5$I?<D*'DX`3P@)@BD*'DX"2;]8+D-)[U@^`B)+7U@N0T
|
||||
MGO6#(A)/C_51$D^E]5(2!HGU4Y">F?#E46`&_:]2$I8&(M,0KP'#P-"0HFSM
|
||||
M\*/O\)"B:G0,\)"B>'0"\'L!>J)Y:A*7W-#0DJ\BTQ"O`</`[email protected]"N^0
|
||||
MC0$23Y7P=?`*[Y"-`Q)/E?!U\`KOD(T%$D^5\'7P"N^0C0<23Y7P=?`*[Y"-
|
||||
M"1)/E9'@Y/`2?Y#@5+]$@/X2?Y#N\-#0DJ\B\.\EX"0!]8+D-)+U@^3PH_!T
|
||||
MD2_U@N0TF/6#(M,0KP'#P-"0HPGO\'^/$D:K[S#F07^-$D:K[V0!<#>0HPKP
|
||||
MD*,*X/V0HPG@=?`0$G6.Y8(M$GI5X/OD_Q)-]Y"C"N`$\.##E!!`V'^/$D:K
|
||||
M[S#@`K%7T-"2KR+D_7^-`D:-TQ"O`</`T)"B&>SPH^WPD*(8[_"CH^#]$CX"
|
||||
MD*(C$@AMD*(;$D5R$@@ZD*(CT73`!,`%P`;`!Y"B&Q)%<I"B']%TT`/0`M`!
|
||||
MT``21520HB<2"&V0HAFCX/W`!9"B)Q)%<I"JEA((;9"B&.#_T`42/0G0T)*O
|
||||
M(I"@W!)%BN#^5`/][A,35`?[D*"NX/[$5`^0HM_PKP33$*\!P\#0D*+<[_#M
|
||||
M9`%P+NNT`0?@)`+U<(`(D*+<X"3^]7"0HAL2"'D```#_KW#19=%=$@AY````
|
||||
M_Z]P@""0HAL2"'D```#_D*+<$EU!T6G171((>0```/^0HMS@_]%E?P&Q7M#0
|
||||
MDJ\BY/^Q7I"B&R+D_/W^D*(?$@AM?1A\`"(217X"14>/59`%(N"0H=CP$E=/
|
||||
M[V0!<$9U\`OE51*?U?QU\`OE5;'4=?`+Y54254D25^-4!R#@''7P"^55$G?8
|
||||
M_V`#OP(.=?`+Y5425Q_D^_T25'&M57\!$E31?P$BD*'8X/]]21)4QG\`(M,0
|
||||
MKP'#P-"0HQ/M\.3^_>^T`0WKM`(##8`&Z[0!`GT"KP;OQ%3P3?_0T)*O(N3^
|
||||
M[U3@Q!-4!_WO5!__[6`L%&`>)/U@#R3^<"KO)>#_PW3>G_Z`'^\EX/_#=/*?
|
||||
M_H`4[R7@_\-T!I_^@`GO)>#_PW00G_ZO!B+3[V2`E!Q`!^]D@)240`-_`"+#
|
||||
M[V2`E(!``W]D(N\D9/\B\9._`1:0H;_@5##_OR`'D*$Z=`'P(N20H3KP(GL!
|
||||
M>J%YOW_[?@$"-,'3$*\!P\#0?P!^"!(W3I"APA((;7\`?@D2-TZ0H<82"&V0
|
||||
MH<(2N!%@&9"APA*X")"APA((;9"APA)'S'\`?@@2.$60H<82N!%@&9"AQA*X
|
||||
M")"AQA((;9"AQA)'S'\`?@D2.$70T)*O(A)%<N]4_O_L(A)%<N]4`?_D_OW\
|
||||
M[R)^`'\!?0![`7J?><\2"*J0G\_@5/WPY!)@=*-T#/`B$53DD)_2\"(29Z*`
|
||||
M\Q)GD8#[email protected]!2?@5+_P(GTN?V\25,9]`G\!$F'&$520G]-T`O`B?2`1
|
||||
M@'0"\"(29^J`\W__$E3&$D?KD)_2(A&%=`+P(A)G['TC$8!T`O`B?2%__Q)4
|
||||
MQI"?TG0#\"(29^J`[1)FN(#O?2)__Q)4QA)G[(#C$F?J`F_/$F:X?20";]&N
|
||||
M!Q)K';\!$Y"?SQ)?WR#@"J\&?0$28EI_`2)_`"*0G]3@5/OPY)"?XO"C\)"?
|
||||
MW?"0G]7@5/?P5+\29'E]$'\#`F8-[R3^8`L$<"20G]]T`O"`$^UP!I"@.>"`
|
||||
M`NT4D)_?\)"?W^"C\)"?U>!$"/`BTQ"O`</`T)"@2N`PX!>0H%S@<&&0G]O@
|
||||
MTY0`4%B0H#S@8$Z`4!*BM^]D`7!(D)_=X/]4`W`_D)_;X/[DPYY`->\@XC&0
|
||||
MG]W@(.0JD)_5X!,35#\PX!^0H#S@<!F0!F+@(.$2D`9BX##@!^!4_&2`8`1_
|
||||
M`8`"?P#0T)*O(I"@,'0$\*,4\*/D\*-T9/"C=`7PH_`B?2]__Q)4QA)'ZWT(
|
||||
M?P$28<:0G]-T"/`BD**RX/_3$*\!P\#0D*,8[_"0GLO@_Y`$'.!O<#F0G]S@
|
||||
M9`YP$)"C&.!P*U%%D`8$$F&^@!Z0G]S@9`9P&9"C&.!@$Y"?U.!4O_!13?"0
|
||||
MG]QT!/`29CK0T)*O(I"?U.!4?_`BD`8$X$1`\.!$@"+3$*\!P\#0D*+H[_"0
|
||||
M!!W@8!^0!2+@D*+K\'TI$E=1OP$#$H>,D*+KX/]]*A)4QH`#$H>,D`0?="#P
|
||||
MT-"2KR+D_N_#$_WO,.`"?H"0_1#M\*\&(I"@KN#_PQ/^[U3Q_^X$5`<EX$_P
|
||||
MH^#_D*"NX/[#$U0'(O]U\`Z0H+L218K@_G7P#N^0H+H218K@D**L\)"BJ^XB
|
||||
MD*'.$D66=?`"Y5JD]8*%\(,2!ZNN\"+E4R7@)%'U@N0T0?6#(N53)>`D>?6"
|
||||
MY#1!]8,BCUCO=?`&I"1<^71`-?#Z>_\B=?`#$D6*X/YT`:@&""+E427@)`'U
|
||||
M@N0TDO6#(G21)5'U@N0TG/6#(G0H+_6"Y#2A]8/@(G7P"J0D`?ETC37P^GL!
|
||||
M(OITT"[email protected]#[O##(I"?U^#_Q%0/(G@($@A:J`2I!:H&JP<B\.Y4"/[O
|
||||
M5/<B?@!_!'T`>P%ZH'D](I"@_N!$$/"0H?O@_R(218K@_*/@]8*,@R(2"%J0
|
||||
MHC$2"&U_`")T!2[U@N0T_/6#X")T(2_U@N0T_/6#X"+O$Q,35!_^[U0'_R)_
|
||||
MA'X($E:PD*(;(OSE5L,3_N57$_\BD`58=`+P(I"BX^#_D*+AX")T`9.55>23
|
||||
ME50B_E0@_>]4WTW_(A)%BN#[Y/T/(G\P?@D2-T[D(I`$'W0@\'\!(I"@/^"0
|
||||
M!7/P(E0!Q#,S,U2`(I`%(N"0H?OP(I"A_^#_=?`+(G7P#N54D*"R(I"!`1)%
|
||||
MBN_P(N5H5'^0HIGP(O"0!.#@D)_5(I"@4.!4W_#D(G].$D:K[U1_(I"BP^!_
|
||||
M2'X)(I"@3>#$$U0'(O!_$'X``CY0D`8*X%3X\"*0!@3@5'_P(GT"?P("7[F0
|
||||
M!2+@5&__(I"?W^#_H^`BD)_?X)`%<R*0H-\218K@(I")!Q)%BN`B_7P`$@<#
|
||||
M[R*0``82!ZLO(O_N7/[O74XBD`4`=!SPHR)4@/[O5'].(I"BB!)%<N\B$D5R
|
||||
7[T2`_R(O^.;^[?1>(A)&J^]$0/TB1,<`
|
||||
`
|
||||
end
|
||||
@@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef RTL8723B_H
|
||||
#define RTL8723B_H
|
||||
|
||||
/*
|
||||
* Global definitions.
|
||||
*/
|
||||
#define R23B_PUBQ_NPAGES 231
|
||||
#define R23B_HPQ_NPAGES 12
|
||||
#define R23B_LPQ_NPAGES 2
|
||||
#define R23B_NPQ_NPAGES 2
|
||||
|
||||
#define R23B_TX_PAGE_COUNT 247
|
||||
|
||||
#define R23B_RX_DMA_BUFFER_SIZE 0x3f80
|
||||
|
||||
#define R23B_CALIB_THRESHOLD 7
|
||||
|
||||
/*
|
||||
* Function declarations.
|
||||
*/
|
||||
|
||||
/* r23b_calib.c */
|
||||
void r23b_iq_calib(struct rtwn_softc *);
|
||||
void r23b_lc_calib(struct rtwn_softc *);
|
||||
void r23b_temp_measure(struct rtwn_softc *);
|
||||
|
||||
/* r23b_fw.c */
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
void r23b_fw_download_enable(struct rtwn_softc *, int);
|
||||
void r23b_fw_reset(struct rtwn_softc *, int);
|
||||
#endif
|
||||
|
||||
/* r23b_init.c */
|
||||
void r23b_init_antsel(struct rtwn_softc *);
|
||||
void r23b_init_bb_common(struct rtwn_softc *);
|
||||
void r23b_init_rf(struct rtwn_softc *);
|
||||
void r23b_post_init(struct rtwn_softc *);
|
||||
int r23b_set_page_size(struct rtwn_softc *);
|
||||
|
||||
/* r23b_led.c */
|
||||
void r23b_set_led(struct rtwn_softc *, int, int);
|
||||
|
||||
/* r23b_rf.c */
|
||||
void r23b_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t);
|
||||
|
||||
/* r23b_rom.c */
|
||||
int r23b_efuse_preread(struct rtwn_softc *);
|
||||
void r23b_parse_rom(struct rtwn_softc *, uint8_t *);
|
||||
|
||||
/* r23b_rx.c */
|
||||
int8_t r23b_get_rssi_cck(struct rtwn_softc *, void *);
|
||||
|
||||
#endif /* RTL8723B_H */
|
||||
@@ -0,0 +1,620 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwn_debug.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e.h>
|
||||
#include <dev/rtwn/rtl8188e/r88e_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_var.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_reg.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_fw_cmd.h>
|
||||
|
||||
struct r23b_iqk_reg_vals {
|
||||
uint32_t adaa[16];
|
||||
uint32_t iqk_bb[9];
|
||||
uint8_t txpause;
|
||||
uint8_t bcn_ctrl[2];
|
||||
uint8_t gpio_muxcfg;
|
||||
};
|
||||
|
||||
struct r23b_iqk_result {
|
||||
int32_t iqk_before;
|
||||
int32_t iqk_after;
|
||||
};
|
||||
|
||||
enum r23b_iqk_stage {
|
||||
R23B_IQK_TX,
|
||||
R23B_IQK_TX_RX,
|
||||
R23B_IQK_RX
|
||||
};
|
||||
|
||||
static const uint16_t r23b_iq_calib_reg_adaa[16] = {
|
||||
0x85c, 0xe6c, 0xe70, 0xe74,
|
||||
0xe78, 0xe7c, 0xe80, 0xe84,
|
||||
0xe88, 0xe8c, 0xed0, 0xed4,
|
||||
0xed8, 0xedc, 0xee0, 0xeec
|
||||
};
|
||||
|
||||
static const uint16_t r23b_iq_calib_reg_iqk_bb[9] = {
|
||||
0xc04, 0xc08, 0x874, 0xb68,
|
||||
0xb6c, 0x870, 0x860, 0x864,
|
||||
0xa04
|
||||
};
|
||||
|
||||
#define R23B_IQK_MAX_TOLERANCE 5
|
||||
#define R23B_IQK_SIGN(r) (((r) & 0x200) ? (0xfffffc00 | (r)) : (r))
|
||||
|
||||
/* XXX
|
||||
* Same as r92c_lc_calib except for LDO on and LDO off
|
||||
*/
|
||||
void
|
||||
r23b_lc_calib(struct rtwn_softc *sc)
|
||||
{
|
||||
uint32_t rf_ac[2];
|
||||
uint8_t txmode;
|
||||
int i;
|
||||
|
||||
txmode = rtwn_read_1(sc, R92C_OFDM1_LSTF + 3);
|
||||
if ((txmode & 0x70) != 0) {
|
||||
/* Disable all continuous Tx. */
|
||||
rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70);
|
||||
|
||||
/* Set RF mode to standby mode. */
|
||||
for (i = 0; i < sc->nrxchains; i++) {
|
||||
rf_ac[i] = rtwn_rf_read(sc, i, R92C_RF_AC);
|
||||
rtwn_rf_write(sc, i, R92C_RF_AC,
|
||||
RW(rf_ac[i], R92C_RF_AC_MODE,
|
||||
R92C_RF_AC_MODE_STANDBY));
|
||||
}
|
||||
} else {
|
||||
/* Block all Tx queues. */
|
||||
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
|
||||
}
|
||||
|
||||
/* LDO on */
|
||||
rtwn_rf_write(sc, 0, R23B_RF_S0S1, 0xdfbe0);
|
||||
|
||||
/* Start calibration. */
|
||||
rtwn_rf_setbits(sc, 0, R92C_RF_CHNLBW, 0, R92C_RF_CHNLBW_LCSTART);
|
||||
|
||||
/* Give calibration the time to complete. */
|
||||
rtwn_delay(sc, 100000); /* 100ms */
|
||||
|
||||
/* LDO off */
|
||||
rtwn_rf_write(sc, 0, R23B_RF_S0S1, 0xdffe0);
|
||||
|
||||
/* Restore configuration. */
|
||||
if ((txmode & 0x70) != 0) {
|
||||
/* Restore Tx mode. */
|
||||
rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode);
|
||||
/* Restore RF mode. */
|
||||
for (i = 0; i < sc->nrxchains; i++)
|
||||
rtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]);
|
||||
} else {
|
||||
/* Unblock all Tx queues. */
|
||||
rtwn_write_1(sc, R92C_TXPAUSE, 0x00);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
r23b_iq_calib_chain(struct rtwn_softc *sc, enum r23b_iqk_stage stage)
|
||||
{
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
uint32_t rf_path;
|
||||
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: starting stage: %s\n",
|
||||
__func__, stage == R23B_IQK_TX ? "R23B_IQK_TX" :
|
||||
stage == R23B_IQK_TX_RX ? "R23B_IQK_TX_RX" : "R23B_IQK_RX");
|
||||
|
||||
/* Save RF path. */
|
||||
rf_path = rtwn_read_4(sc, R23B_ANT_SEL);
|
||||
|
||||
/* Leave IQK mode. */
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
|
||||
rtwn_rf_setbits(sc, 0, R88E_RF_WE_LUT, 0, 0x80000);
|
||||
switch (stage) {
|
||||
case R23B_IQK_TX:
|
||||
rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x20000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0x0003f);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(1), 0xc7f87);
|
||||
|
||||
rtwn_write_4(sc, R92C_TX_IQK, 0x01007c00);
|
||||
break;
|
||||
case R23B_IQK_TX_RX:
|
||||
rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x30000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0x0001f);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(1), 0xf7fb7);
|
||||
|
||||
rtwn_write_4(sc, R92C_TX_IQK, 0x01007c00);
|
||||
break;
|
||||
case R23B_IQK_RX:
|
||||
rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x30000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0x0001f);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(1), 0xf7d77);
|
||||
|
||||
rtwn_rf_write(sc, 0, 0xdf, 0xf80);
|
||||
rtwn_rf_write(sc, 0, 0x55, 0x4021f);
|
||||
break;
|
||||
default:
|
||||
KASSERT(0, ("%s: Invalid stage %d", __func__, stage));
|
||||
}
|
||||
|
||||
rtwn_write_4(sc, R92C_RX_IQK, 0x01004800);
|
||||
|
||||
switch (stage) {
|
||||
case R23B_IQK_TX:
|
||||
case R23B_IQK_TX_RX:
|
||||
rtwn_write_4(sc, R92C_TX_IQK_TONE(0), 0x18008c1c);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_TONE(0), 0x38008c1c);
|
||||
break;
|
||||
case R23B_IQK_RX:
|
||||
rtwn_write_4(sc, R92C_TX_IQK_TONE(0), 0x38008c1c);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_TONE(0), 0x18008c1c);
|
||||
break;
|
||||
}
|
||||
rtwn_write_4(sc, R92C_TX_IQK_TONE(1), 0x38008c1c);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_TONE(1), 0x38008c1c);
|
||||
|
||||
switch (stage) {
|
||||
case R23B_IQK_TX:
|
||||
rtwn_write_4(sc, R92C_TX_IQK_PI(0), 0x821403ea);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_PI(0), 0x28110000);
|
||||
break;
|
||||
case R23B_IQK_TX_RX:
|
||||
rtwn_write_4(sc, R92C_TX_IQK_PI(0), 0x82160ff0);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_PI(0), 0x28110000);
|
||||
break;
|
||||
case R23B_IQK_RX:
|
||||
rtwn_write_4(sc, R92C_TX_IQK_PI(0), 0x82110000);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_PI(0), 0x2816001f);
|
||||
break;
|
||||
}
|
||||
|
||||
rtwn_write_4(sc, R92C_TX_IQK_PI(1), 0x82110000);
|
||||
rtwn_write_4(sc, R92C_RX_IQK_PI(1), 0x28110000);
|
||||
|
||||
switch (stage) {
|
||||
case R23B_IQK_TX:
|
||||
rtwn_write_4(sc, R92C_IQK_AGC_RSP, 0x00462911);
|
||||
break;
|
||||
case R23B_IQK_TX_RX:
|
||||
rtwn_write_4(sc, R92C_IQK_AGC_RSP, 0x0046a911);
|
||||
break;
|
||||
case R23B_IQK_RX:
|
||||
rtwn_write_4(sc, R92C_IQK_AGC_RSP, 0x0046a8d1);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Enter IQK mode. */
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0x80800000);
|
||||
|
||||
rtwn_write_4(sc, R23B_ANT_SEL, rs->bt_antnum == 0 ?
|
||||
R23B_ANT_SEL_S0 : R23B_ANT_SEL_S1);
|
||||
|
||||
/* GNT_BT = 0 */
|
||||
rtwn_write_4(sc, R23B_GNT_BT, 0x00000800);
|
||||
|
||||
/* We're doing LO and IQ calibration in one shot. */
|
||||
rtwn_write_4(sc, R92C_IQK_AGC_PTS, 0xf9000000);
|
||||
rtwn_write_4(sc, R92C_IQK_AGC_PTS, 0xf8000000);
|
||||
|
||||
rtwn_delay(sc, 20000); /* 20ms */
|
||||
|
||||
/* Restore RF path. */
|
||||
rtwn_write_4(sc, R23B_ANT_SEL, rf_path);
|
||||
|
||||
/* GNT_BT = 1 */
|
||||
rtwn_write_4(sc, R23B_GNT_BT, 0x00001800);
|
||||
|
||||
/* Leave IQK mode. */
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
}
|
||||
|
||||
static bool
|
||||
r23b_iq_calib_get_tx_result(struct rtwn_softc *sc,
|
||||
struct r23b_iqk_result *tx_result)
|
||||
{
|
||||
uint32_t val;
|
||||
|
||||
val = rtwn_read_4(sc, R92C_RX_POWER_IQK_AFTER(0));
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: rx_after (%#x): %#x\n",
|
||||
__func__, R92C_RX_POWER_IQK_AFTER(0), val);
|
||||
if (val & 0x10000000)
|
||||
return (false);
|
||||
|
||||
val = rtwn_read_4(sc, R92C_TX_POWER_IQK_BEFORE(0));
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: tx_before (%#x): %#x\n",
|
||||
__func__, R92C_TX_POWER_IQK_BEFORE(0), val);
|
||||
val = MS(val, R92C_POWER_IQK_RESULT);
|
||||
if (val == 0x142 || val >= 0x110 || val <= 0xf0)
|
||||
return (false);
|
||||
tx_result->iqk_before = val;
|
||||
|
||||
val = rtwn_read_4(sc, R92C_TX_POWER_IQK_AFTER(0));
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: tx_after (%#x): %#x\n",
|
||||
__func__, R92C_TX_POWER_IQK_AFTER(0), val);
|
||||
|
||||
val = MS(val, R92C_POWER_IQK_RESULT);
|
||||
if (val == 0x42)
|
||||
return (false);
|
||||
tx_result->iqk_after = val;
|
||||
|
||||
if ((val & 0x200) != 0)
|
||||
val = 0x400 - val;
|
||||
return (val < 0xf);
|
||||
}
|
||||
|
||||
static bool
|
||||
r23b_iq_calib_get_rx_result(struct rtwn_softc *sc,
|
||||
struct r23b_iqk_result *rx_result)
|
||||
{
|
||||
uint32_t iqk_before, iqk_after, val;
|
||||
|
||||
iqk_after = rtwn_read_4(sc, R92C_RX_POWER_IQK_AFTER(0));
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: rx_after (%#x): %#x\n",
|
||||
__func__, R92C_RX_POWER_IQK_AFTER(0), iqk_after);
|
||||
|
||||
iqk_after = MS(iqk_after, R92C_POWER_IQK_RESULT);
|
||||
|
||||
iqk_before = rtwn_read_4(sc, R92C_RX_POWER_IQK_BEFORE(0));
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: rx_before (%#x): %#x\n",
|
||||
__func__, R92C_RX_POWER_IQK_BEFORE(0), iqk_before);
|
||||
|
||||
iqk_before = MS(iqk_before, R92C_POWER_IQK_RESULT);
|
||||
|
||||
/* Leave IQK mode. */
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
rtwn_rf_write(sc, 0, 0xdf, 0x780);
|
||||
|
||||
val = (iqk_after & 0x200) != 0 ? 0x400 - iqk_after : iqk_after;
|
||||
if (iqk_after & 0x8000000)
|
||||
return (false);
|
||||
|
||||
if (iqk_before == 0x132 || iqk_before >= 0x110 || iqk_before <= 0xf0)
|
||||
return (false);
|
||||
|
||||
if (iqk_after == 0x36)
|
||||
return (false);
|
||||
|
||||
if (val >= 0xf)
|
||||
return (false);
|
||||
|
||||
rx_result->iqk_before = iqk_before;
|
||||
rx_result->iqk_after = iqk_after;
|
||||
return (true);
|
||||
}
|
||||
|
||||
static inline void
|
||||
r23b_iq_calib_save_regs(struct rtwn_softc *sc,
|
||||
struct r23b_iqk_reg_vals *vals)
|
||||
{
|
||||
for (int i = 0; i < nitems(r23b_iq_calib_reg_adaa); i++)
|
||||
vals->adaa[i] = rtwn_read_4(sc, r23b_iq_calib_reg_adaa[i]);
|
||||
|
||||
vals->txpause = rtwn_read_1(sc, R92C_TXPAUSE);
|
||||
|
||||
for (int i = 0; i < sizeof(vals->bcn_ctrl); i++)
|
||||
vals->bcn_ctrl[i] = rtwn_read_1(sc, R92C_BCN_CTRL(i));
|
||||
|
||||
vals->gpio_muxcfg = rtwn_read_4(sc, R92C_GPIO_MUXCFG);
|
||||
|
||||
for (int i = 0; i < nitems(r23b_iq_calib_reg_iqk_bb); i++)
|
||||
vals->iqk_bb[i] = rtwn_read_4(sc, r23b_iq_calib_reg_iqk_bb[i]);
|
||||
}
|
||||
|
||||
static inline void
|
||||
r23b_iq_calib_restore_regs(struct rtwn_softc *sc,
|
||||
const struct r23b_iqk_reg_vals *vals)
|
||||
{
|
||||
for (int i = 0; i < nitems(r23b_iq_calib_reg_adaa); i++)
|
||||
rtwn_write_4(sc, r23b_iq_calib_reg_adaa[i], vals->adaa[i]);
|
||||
|
||||
rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause);
|
||||
|
||||
for (int i = 0; i < sizeof(vals->bcn_ctrl); i++)
|
||||
rtwn_write_1(sc, R92C_BCN_CTRL(i), vals->bcn_ctrl[i]);
|
||||
|
||||
rtwn_write_4(sc, R92C_GPIO_MUXCFG, vals->gpio_muxcfg);
|
||||
|
||||
for (int i = 0; i < nitems(r23b_iq_calib_reg_iqk_bb); i++)
|
||||
rtwn_write_4(sc, r23b_iq_calib_reg_iqk_bb[i], vals->iqk_bb[i]);
|
||||
}
|
||||
|
||||
static void
|
||||
r23b_iq_calib_run(struct rtwn_softc *sc, struct r23b_iqk_result *tx_result,
|
||||
struct r23b_iqk_result *rx_result, const struct r23b_iqk_reg_vals *vals)
|
||||
{
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
|
||||
for (int i = 0; i < nitems(r23b_iq_calib_reg_adaa); i++)
|
||||
rtwn_write_4(sc, r23b_iq_calib_reg_adaa[i], 0x01c00014);
|
||||
|
||||
/* MAC settings */
|
||||
|
||||
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_AC |
|
||||
R92C_TX_QUEUE_MGT | R92C_TX_QUEUE_HIGH);
|
||||
|
||||
for (int i = 0; i < sizeof(vals->bcn_ctrl); i++) {
|
||||
rtwn_write_1(sc, R92C_BCN_CTRL(i),
|
||||
vals->bcn_ctrl[i] & ~R92C_BCN_CTRL_EN_BCN);
|
||||
}
|
||||
|
||||
rtwn_write_1(sc, R92C_GPIO_MUXCFG,
|
||||
vals->gpio_muxcfg & ~R92C_GPIO_MUXCFG_ENBT);
|
||||
|
||||
/* BB settings */
|
||||
|
||||
rtwn_setbits_4(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000);
|
||||
rtwn_write_4(sc, R92C_OFDM0_TRXPATHENA, 0x03a05600);
|
||||
rtwn_write_4(sc, R92C_OFDM0_TRMUXPAR, 0x000800e4);
|
||||
rtwn_write_4(sc, R92C_FPGA0_RFIFACESW(1), 0x22204000);
|
||||
|
||||
/* IQ calibration settings */
|
||||
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
rtwn_rf_setbits(sc, 0, R88E_RF_WE_LUT, 0, 0x80000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x30000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0x0001f);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(1), 0xf7fb7);
|
||||
rtwn_rf_setbits(sc, 0, 0xed, 0, 0x20);
|
||||
rtwn_rf_write(sc, 0, 0x43, 0x60fbd);
|
||||
|
||||
/* Path A Tx IQ calibration. */
|
||||
for (int retry = 0; retry < 2; retry++) {
|
||||
r23b_iq_calib_chain(sc, R23B_IQK_TX);
|
||||
|
||||
if (r23b_iq_calib_get_tx_result(sc, tx_result)) {
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
break;
|
||||
}
|
||||
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: Tx failed, retry=%d\n", __func__, retry);
|
||||
}
|
||||
|
||||
/* Path A Rx IQ calibration. */
|
||||
for (int retry = 0; retry < 2; retry++) {
|
||||
struct r23b_iqk_result result;
|
||||
|
||||
r23b_iq_calib_chain(sc, R23B_IQK_TX_RX);
|
||||
if (!r23b_iq_calib_get_tx_result(sc, &result)) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: Rx (Tx) failed, retry=%d\n", __func__, retry);
|
||||
continue;
|
||||
}
|
||||
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: writing %#x to TX_IQK\n", __func__,
|
||||
0x80007c00 | (result.iqk_before << 16) | result.iqk_after);
|
||||
|
||||
rtwn_write_4(sc, R92C_TX_IQK,
|
||||
0x80007c00 | (result.iqk_before << 16) | result.iqk_after);
|
||||
|
||||
r23b_iq_calib_chain(sc, R23B_IQK_RX);
|
||||
if (!r23b_iq_calib_get_rx_result(sc, rx_result)) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: Rx failed, retry=%d\n", __func__, retry);
|
||||
continue;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
if (rs->bt_antnum == 0) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: path B IQK not implemented!\n", __func__);
|
||||
}
|
||||
|
||||
rtwn_setbits_4(sc, R92C_FPGA0_IQK, ~0xff, 0);
|
||||
}
|
||||
|
||||
static bool
|
||||
r23b_iq_calib_compare_results(
|
||||
struct r23b_iqk_result *tx_result1, struct r23b_iqk_result *rx_result1,
|
||||
struct r23b_iqk_result *tx_result2, struct r23b_iqk_result *rx_result2,
|
||||
struct r23b_iqk_result **tx_candidate,
|
||||
struct r23b_iqk_result **rx_candidate) {
|
||||
uint32_t diff;
|
||||
bool tx_good = false;
|
||||
|
||||
diff = abs(tx_result1->iqk_before - tx_result2->iqk_before);
|
||||
if (diff > R23B_IQK_MAX_TOLERANCE)
|
||||
goto rx_compare;
|
||||
|
||||
diff = abs(R23B_IQK_SIGN(tx_result1->iqk_after) -
|
||||
R23B_IQK_SIGN(tx_result2->iqk_after));
|
||||
if (diff <= R23B_IQK_MAX_TOLERANCE) {
|
||||
*tx_candidate = tx_result1;
|
||||
tx_good = true;
|
||||
}
|
||||
|
||||
rx_compare:
|
||||
diff = abs(rx_result1->iqk_before - rx_result2->iqk_before);
|
||||
if (diff > R23B_IQK_MAX_TOLERANCE) {
|
||||
if (tx_good &&
|
||||
rx_result1->iqk_before + rx_result1->iqk_after == 0)
|
||||
*tx_candidate = tx_result2;
|
||||
|
||||
return (false);
|
||||
}
|
||||
|
||||
diff = abs(R23B_IQK_SIGN(rx_result1->iqk_after) -
|
||||
R23B_IQK_SIGN(rx_result2->iqk_after));
|
||||
if (diff > R23B_IQK_MAX_TOLERANCE)
|
||||
return (false);
|
||||
|
||||
*rx_candidate = rx_result1;
|
||||
return (tx_good);
|
||||
}
|
||||
|
||||
void
|
||||
r23b_iq_calib(struct rtwn_softc *sc)
|
||||
{
|
||||
struct r23b_iqk_reg_vals vals;
|
||||
struct r23b_iqk_result tx_result[3] = { 0 };
|
||||
struct r23b_iqk_result rx_result[3] = { 0 };
|
||||
struct r23b_iqk_result *tx_candidate = NULL, *rx_candidate = NULL;
|
||||
uint32_t oldval, val;
|
||||
uint32_t gnt_bt;
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
/* Inform firmware that we're begininng IQK. */
|
||||
r88e_fw_cmd(sc, R23B_CMD_WLAN_CALIB, R23B_CMD_WLAN_CALIB_BEGIN,
|
||||
sizeof(R23B_CMD_WLAN_CALIB_BEGIN));
|
||||
#endif
|
||||
|
||||
/* Save GNT_BT. */
|
||||
gnt_bt = rtwn_read_4(sc, R23B_GNT_BT);
|
||||
|
||||
r23b_iq_calib_save_regs(sc, &vals);
|
||||
r23b_iq_calib_run(sc, &tx_result[0], &rx_result[0], &vals);
|
||||
r23b_iq_calib_run(sc, &tx_result[1], &rx_result[1], &vals);
|
||||
r23b_iq_calib_restore_regs(sc, &vals);
|
||||
|
||||
if (r23b_iq_calib_compare_results(&tx_result[0], &rx_result[0],
|
||||
&tx_result[1], &rx_result[1], &tx_candidate, &rx_candidate)) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: comparing 0 and 1 succeeded\n", __func__);
|
||||
goto write;
|
||||
}
|
||||
|
||||
r23b_iq_calib_run(sc, &tx_result[2], &rx_result[2], &vals);
|
||||
r23b_iq_calib_restore_regs(sc, &vals);
|
||||
|
||||
if (r23b_iq_calib_compare_results(&tx_result[0], &rx_result[0],
|
||||
&tx_result[2], &rx_result[2], &tx_candidate, &rx_candidate)) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: comparing 0 and 2 succeeded\n", __func__);
|
||||
goto write;
|
||||
}
|
||||
|
||||
if (!r23b_iq_calib_compare_results(&tx_result[1], &rx_result[1],
|
||||
&tx_result[2], &rx_result[2], &tx_candidate, &rx_candidate)) {
|
||||
/* If no candidate was assigned, set the result to zero. */
|
||||
if (tx_candidate == NULL) {
|
||||
tx_result[0] = (struct r23b_iqk_result){ 0 };
|
||||
tx_candidate = &tx_result[0];
|
||||
}
|
||||
|
||||
if (rx_candidate == NULL) {
|
||||
rx_result[0] = (struct r23b_iqk_result){ 0 };
|
||||
rx_candidate = &rx_result[0];
|
||||
}
|
||||
|
||||
if (tx_candidate->iqk_before == 0 &&
|
||||
tx_candidate->iqk_after == 0 &&
|
||||
rx_candidate->iqk_before == 0 &&
|
||||
rx_candidate->iqk_after == 0) {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: IQK failed\n", __func__);
|
||||
goto done;
|
||||
}
|
||||
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: comparison failed but a candidate was assigned\n",
|
||||
__func__);
|
||||
} else {
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
|
||||
"%s: comparing 1 and 2 succeeded\n", __func__);
|
||||
}
|
||||
|
||||
write:
|
||||
RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "%s: IQK candidate dump:\n"
|
||||
"\ttx_candidate->iqk_before 0x%x\ttx_candidate->iqk_after 0x%x\n"
|
||||
"\trx_candidate->iqk_before 0x%x\trx_candidate->iqk_after 0x%x\n",
|
||||
__func__, tx_candidate->iqk_before, tx_candidate->iqk_after,
|
||||
rx_candidate->iqk_before, rx_candidate->iqk_after);
|
||||
|
||||
/*
|
||||
* Don't write both the tx and rx configuration
|
||||
* values if tx IQK failed.
|
||||
*/
|
||||
if (tx_candidate->iqk_before == 0)
|
||||
goto done;
|
||||
|
||||
/* Write path A values */
|
||||
|
||||
oldval = rtwn_read_4(sc, R92C_OFDM0_TXIQIMBALANCE(0));
|
||||
oldval = (oldval >> 22) & 0x3ff;
|
||||
|
||||
val = (R23B_IQK_SIGN(tx_candidate->iqk_before) * oldval) >> 7;
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x3ff,
|
||||
(val >> 1) & 0x3ff);
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, val << 31);
|
||||
|
||||
val = (R23B_IQK_SIGN(tx_candidate->iqk_after) * oldval) >> 7;
|
||||
rtwn_setbits_4(sc, R92C_TX_POWER_IQK_BEFORE(0),
|
||||
0xf0000000, (((val >> 1) & 0x3c0) >> 6) << 28);
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_TXIQIMBALANCE(0),
|
||||
0x3f0000, ((val >> 1) & 0x3f) << 16);
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_ECCATHRESHOLD,
|
||||
0x10000000, (val << 29) & 0x1);
|
||||
|
||||
/* Skip the rx configuration values if rx IQK failed. */
|
||||
if (rx_candidate->iqk_before == 0)
|
||||
goto done;
|
||||
|
||||
val = rx_candidate->iqk_after & 0x3f;
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0x3ff,
|
||||
rx_candidate->iqk_before);
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0xfc00, val << 10);
|
||||
|
||||
val = (rx_candidate->iqk_after >> 6) & 0xf;
|
||||
rtwn_setbits_4(sc, R92C_OFDM0_RXIQEXTANTA, 0xf0000000, val << 28);
|
||||
done:
|
||||
/* Restore GNT_BT. */
|
||||
rtwn_write_4(sc, R23B_GNT_BT, gnt_bt);
|
||||
|
||||
rtwn_rf_setbits(sc, 0, R88E_RF_WE_LUT, 0, 0x80000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x18000);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0x0001f);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0xe6177);
|
||||
rtwn_rf_setbits(sc, 0, 0xed, 0, 0x20);
|
||||
rtwn_rf_write(sc, 0, 0x43, 0x300bd);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
/* Inform firmware that we're done. */
|
||||
r88e_fw_cmd(sc, R23B_CMD_WLAN_CALIB, R23B_CMD_WLAN_CALIB_END,
|
||||
sizeof(R23B_CMD_WLAN_CALIB_END));
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
r23b_temp_measure(struct rtwn_softc *sc)
|
||||
{
|
||||
rtwn_rf_setbits(sc, 0, R88E_RF_T_METER, 0, R88E_RF_T_METER_START);
|
||||
}
|
||||
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c.h>
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
void
|
||||
r23b_fw_reset(struct rtwn_softc *sc, int reason)
|
||||
{
|
||||
switch (reason) {
|
||||
case RTWN_FW_RESET_DOWNLOAD:
|
||||
case RTWN_FW_RESET_SHUTDOWN:
|
||||
return (r92c_fw_reset(sc, reason));
|
||||
case RTWN_FW_RESET_CHECKSUM:
|
||||
return (r92e_fw_reset(sc, reason));
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
r23b_fw_download_enable(struct rtwn_softc *sc, int enable)
|
||||
{
|
||||
if (!enable) {
|
||||
/* MCU download disable. */
|
||||
rtwn_setbits_1(sc, R92C_MCUFWDL, R92C_MCUFWDL_EN, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
/* 8051 enable. */
|
||||
rtwn_setbits_1_shift(sc, R92C_SYS_FUNC_EN, 0,
|
||||
R92C_SYS_FUNC_EN_CPUEN, 1);
|
||||
/* MCU firmware download enable. */
|
||||
rtwn_setbits_1(sc, R92C_MCUFWDL, 0, R92C_MCUFWDL_EN);
|
||||
|
||||
for (int ntries = 0; ntries <= 100; ntries++) {
|
||||
uint8_t val;
|
||||
|
||||
val = rtwn_read_1(sc, R92C_MCUFWDL);
|
||||
if (val & R92C_MCUFWDL_EN)
|
||||
break;
|
||||
|
||||
rtwn_write_1(sc, R92C_MCUFWDL, val | R92C_MCUFWDL_EN);
|
||||
rtwn_delay(sc, 1000);
|
||||
}
|
||||
|
||||
/* 8051 reset. */
|
||||
rtwn_setbits_1_shift(sc, R92C_MCUFWDL, R92C_MCUFWDL_ROM_DLEN,
|
||||
0, 2);
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_FW_CMD_H
|
||||
#define R23B_FW_CMD_H
|
||||
|
||||
/*
|
||||
* Host to firmware commands.
|
||||
*/
|
||||
#define R23B_CMD_RSSI_SETTING 0x42
|
||||
#define R23B_CMD_PS_TDMA 0x60
|
||||
#define R23B_CMD_BT_INFO 0x61
|
||||
#define R23B_CMD_BT_WLANACT 0x63
|
||||
#define R23B_CMD_ANT_INV 0x65
|
||||
#define R23B_CMD_BT_MP_OPER 0x67
|
||||
#define R23B_CMD_WLAN_CALIB 0x6d
|
||||
#define R23B_CMD_BT_GRANT 0x6e
|
||||
|
||||
#define R23B_CMD_BT_WLANACT_IGNORE ((uint8_t[]){ 0 })
|
||||
|
||||
#define R23B_CMD_WLAN_CALIB_BEGIN ((uint8_t[]){ 1 })
|
||||
#define R23B_CMD_WLAN_CALIB_END ((uint8_t[]){ 0 })
|
||||
|
||||
#define R23B_CMD_BT_GRANT_LOW ((uint8_t[]){ 0 })
|
||||
#define R23B_CMD_BT_GRANT_HIGH ((uint8_t[]){ 1 })
|
||||
|
||||
/* Structure for R23B_CMD_RSSI_SETTING. */
|
||||
struct r23b_fw_cmd_rssi {
|
||||
uint8_t macid;
|
||||
uint8_t reserved;
|
||||
uint8_t pwdb;
|
||||
uint8_t uldl;
|
||||
} __packed;
|
||||
|
||||
/* Structure for R23B_CMD_BT_MP_OPER. */
|
||||
struct r23b_fw_cmd_btoper {
|
||||
uint8_t req_num;
|
||||
uint8_t opcode;
|
||||
#define R23B_BT_MP_OPER_WRITE_VAL 0xd
|
||||
#define R23B_BT_MP_OPER_WRITE_ADDR 0xc
|
||||
|
||||
uint8_t value;
|
||||
uint8_t addr;
|
||||
} __packed;
|
||||
|
||||
/* Structure for R23B_CMD_ANT_INV. */
|
||||
struct r23b_fw_cmd_antinv {
|
||||
uint8_t invert;
|
||||
uint8_t internal_switch;
|
||||
} __packed;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e.h>
|
||||
#include <dev/rtwn/rtl8188e/r88e_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e.h>
|
||||
#include <dev/rtwn/rtl8192e/r92e_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_reg.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_var.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_fw_cmd.h>
|
||||
|
||||
#include <dev/rtwn/rtl8821a/r21a_reg.h>
|
||||
|
||||
int
|
||||
r23b_set_page_size(struct rtwn_softc *sc)
|
||||
{
|
||||
return (rtwn_write_1(sc, R92C_PBP, SM(R92C_PBP_PSRX, R92C_PBP_256) |
|
||||
SM(R92C_PBP_PSTX, R92C_PBP_256)));
|
||||
}
|
||||
|
||||
void
|
||||
r23b_init_antsel(struct rtwn_softc *sc)
|
||||
{
|
||||
rtwn_setbits_4(sc, R88E_BB_PAD_CTRL, 0x1100000, 0);
|
||||
rtwn_setbits_4(sc, R92C_GPIO_MUXCFG, 0x10, 0x8);
|
||||
rtwn_setbits_4(sc, R92C_LEDCFG0, 0x400000, 0x800000);
|
||||
rtwn_setbits_4(sc, 0x944, 0, 0x3);
|
||||
rtwn_setbits_4(sc, 0x930, 0xff, 0x77);
|
||||
rtwn_setbits_4(sc, R92C_PWR_DATA, 0, 0x800);
|
||||
}
|
||||
|
||||
void
|
||||
r23b_init_bb_common(struct rtwn_softc *sc)
|
||||
{
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
uint8_t val;
|
||||
|
||||
/* PathA RF Power On. */
|
||||
rtwn_write_1(sc, R92C_RF_CTRL,
|
||||
R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB);
|
||||
|
||||
rtwn_delay(sc, 10);
|
||||
|
||||
rtwn_rf_write(sc, 0, R92C_RF_IQADJ_G(0), 0x780);
|
||||
|
||||
rtwn_write_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BBRSTB |
|
||||
R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_DIO_PCIE |
|
||||
R92C_SYS_FUNC_EN_PCIEA | R92C_SYS_FUNC_EN_PPLL);
|
||||
|
||||
rtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80);
|
||||
|
||||
for (int i = 0; i < sc->bb_size; i++) {
|
||||
const struct rtwn_bb_prog *bb_prog = &sc->bb_prog[i];
|
||||
|
||||
for (int j = 0; j < bb_prog->count; j++) {
|
||||
rtwn_write_4(sc, bb_prog->reg[j], bb_prog->val[j]);
|
||||
rtwn_delay(sc, 1);
|
||||
}
|
||||
}
|
||||
|
||||
for (int i = 0; i < sc->agc_size; i++) {
|
||||
const struct rtwn_agc_prog *agc_prog = &sc->agc_prog[i];
|
||||
|
||||
for (int j = 0; j < agc_prog->count; j++) {
|
||||
rtwn_write_4(sc, R92C_OFDM0_AGCRSSITABLE,
|
||||
agc_prog->val[j]);
|
||||
rtwn_delay(sc, 1);
|
||||
}
|
||||
}
|
||||
|
||||
rtwn_write_4(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422);
|
||||
rtwn_delay(sc, 1);
|
||||
rtwn_write_4(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420);
|
||||
rtwn_delay(sc, 1);
|
||||
rtwn_write_4(sc, R92C_HSSI_PARAM2(0), 0x00390204);
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
val = rs->super.crystalcap & 0x3f;
|
||||
rtwn_setbits_4(sc, R92C_MAC_PHY_CTRL, R21A_MAC_PHY_CRYSTALCAP_M,
|
||||
SM(R21A_MAC_PHY_CRYSTALCAP, val | (val << 6)));
|
||||
}
|
||||
|
||||
void
|
||||
r23b_init_rf(struct rtwn_softc *sc)
|
||||
{
|
||||
r92e_init_rf(sc);
|
||||
|
||||
/* Init LCK. */
|
||||
rtwn_rf_write(sc, 0, R23B_RF_S0S1, 0xdfbe0);
|
||||
rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 0x8c01);
|
||||
rtwn_delay(sc, 200000);
|
||||
rtwn_rf_write(sc, 0, R23B_RF_S0S1, 0xdffe0);
|
||||
}
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
static void
|
||||
r23b_write_btreg(struct rtwn_softc *sc, uint8_t addr, uint8_t data)
|
||||
{
|
||||
struct r23b_fw_cmd_btoper cmd;
|
||||
|
||||
cmd.req_num = 0;
|
||||
cmd.opcode = R23B_BT_MP_OPER_WRITE_VAL;
|
||||
cmd.value = data;
|
||||
cmd.addr = 0;
|
||||
r88e_fw_cmd(sc, R23B_CMD_BT_MP_OPER, &cmd, sizeof(cmd));
|
||||
|
||||
rtwn_delay(sc, 200000); /* 200ms */
|
||||
|
||||
cmd.req_num = 1;
|
||||
cmd.opcode = R23B_BT_MP_OPER_WRITE_ADDR;
|
||||
cmd.value = 0;
|
||||
cmd.addr = addr;
|
||||
r88e_fw_cmd(sc, R23B_CMD_BT_MP_OPER, &cmd, sizeof(cmd));
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
r23b_post_init(struct rtwn_softc *sc)
|
||||
{
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
struct r23b_fw_cmd_antinv cmd;
|
||||
const uint8_t ps_tdma[5] = { 0x8, 0x0, 0x0, 0x0, 0x0 };
|
||||
#endif
|
||||
|
||||
if (sc->macid_rpt2_max_num > 0) {
|
||||
rtwn_setbits_1(sc, R88E_TX_RPT_CTRL, 0, R88E_TX_RPT2_ENA);
|
||||
rtwn_write_1(sc, R88E_TX_RPT_MACID_MAX, sc->macid_rpt2_max_num);
|
||||
/* Enable periodic TX report; 32uS units */
|
||||
rtwn_write_2(sc, R88E_TX_RPT_TIME, 0xcdf0);
|
||||
}
|
||||
|
||||
rtwn_lc_calib(sc);
|
||||
rtwn_iq_calib(sc);
|
||||
|
||||
/* Enable RF */
|
||||
|
||||
/* XXX lots of magic numbers here. */
|
||||
|
||||
rtwn_write_1(sc, 0x790, 0x5);
|
||||
rtwn_write_1(sc, 0x778, 0x1);
|
||||
rtwn_setbits_1(sc, R92C_GPIO_MUXCFG, 0, R92C_GPIO_MUXCFG_ENBT);
|
||||
|
||||
/* WiFi TRx Mask on */
|
||||
rtwn_rf_write(sc, 0, R92C_RF_IQADJ_G(0), 0x780);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
/* BT TRx Mask on */
|
||||
r23b_write_btreg(sc, 0x3c, 0x15);
|
||||
|
||||
r88e_fw_cmd(sc, R23B_CMD_BT_GRANT, R23B_CMD_BT_GRANT_LOW,
|
||||
sizeof(R23B_CMD_BT_GRANT_LOW));
|
||||
#endif
|
||||
|
||||
rtwn_write_1(sc, 0x76e, 0x4);
|
||||
rtwn_setbits_1(sc, R88E_BB_PAD_CTRL + 3, 0, 0x20);
|
||||
rtwn_setbits_1(sc, R92C_PWR_DATA + 1, 0, 0x8);
|
||||
rtwn_write_1(sc, 0x974, 0xff);
|
||||
rtwn_setbits_1(sc, 0x944, 0, 0x3);
|
||||
rtwn_write_1(sc, 0x930, 0x77);
|
||||
|
||||
rtwn_setbits_4(sc, R92C_LEDCFG0, 0x1000000, 0x800000);
|
||||
rtwn_setbits_1(sc, R88E_BB_PAD_CTRL, 0x1, 0);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
/* Inform firmware of the antenna inversion. */
|
||||
cmd.internal_switch = 0;
|
||||
cmd.invert = 1;
|
||||
|
||||
r88e_fw_cmd(sc, R23B_CMD_ANT_INV, &cmd, sizeof(cmd));
|
||||
#endif
|
||||
|
||||
rtwn_write_4(sc, R23B_ANT_SEL, 0x80);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
r88e_fw_cmd(sc, R23B_CMD_PS_TDMA, ps_tdma, sizeof(ps_tdma));
|
||||
#endif
|
||||
|
||||
/* btcoex table */
|
||||
rtwn_write_4(sc, R23B_BTCOEX_TABLE(0), 0x55555555);
|
||||
rtwn_write_4(sc, R23B_BTCOEX_TABLE(1), 0x55555555);
|
||||
rtwn_write_4(sc, R23B_BTCOEX_TABLE(2), 0x00ffffff);
|
||||
rtwn_write_4(sc, R23B_BTCOEX_TABLE(3), 0x00000003);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
r88e_fw_cmd(sc, R23B_CMD_BT_INFO, &(uint8_t){ 1 }, sizeof(uint8_t));
|
||||
r88e_fw_cmd(sc, R23B_CMD_BT_WLANACT, R23B_CMD_BT_WLANACT_IGNORE,
|
||||
sizeof(R23B_CMD_BT_WLANACT_IGNORE));
|
||||
#endif
|
||||
|
||||
/* ACK for xmit mgmt frames. */
|
||||
rtwn_setbits_4(sc, R92C_FWHW_TXQ_CTRL, 0, R23B_FWHW_TXQ_CTRL_ACK_MGNT);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
if (sc->sc_flags & RTWN_FW_LOADED) {
|
||||
if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
|
||||
/* TODO: implement */
|
||||
sc->sc_ratectl = RTWN_RATECTL_NET80211;
|
||||
} else
|
||||
sc->sc_ratectl = sc->sc_ratectl_sysctl;
|
||||
} else
|
||||
#endif
|
||||
sc->sc_ratectl = RTWN_RATECTL_NONE;
|
||||
}
|
||||
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_reg.h>
|
||||
|
||||
void
|
||||
r23b_set_led(struct rtwn_softc *sc, int led, int on)
|
||||
{
|
||||
if (led != RTWN_LED_LINK)
|
||||
return;
|
||||
|
||||
sc->ledlink = on;
|
||||
rtwn_setbits_1(sc, R92C_LEDCFG2, R23B_LEDCFG2_LED_M,
|
||||
R23B_LEDCFG2_LED_SW_CTRL | (on ? 0 : R23B_LEDCFG2_LED_DISABLE));
|
||||
}
|
||||
@@ -0,0 +1,211 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_PRIV_H
|
||||
#define R23B_PRIV_H
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b_rom_defs.h>
|
||||
|
||||
static const struct rtwn_mac_prog rtl8723b_mac[] = {
|
||||
{ 0x02f, 0x30 }, { 0x035, 0x00 }, { 0x039, 0x08 }, { 0x04e, 0xe0 },
|
||||
{ 0x064, 0x00 }, { 0x067, 0x20 }, { 0x428, 0x0a }, { 0x429, 0x10 },
|
||||
{ 0x430, 0x00 }, { 0x431, 0x00 }, { 0x432, 0x00 }, { 0x433, 0x01 },
|
||||
{ 0x434, 0x04 }, { 0x435, 0x05 }, { 0x436, 0x07 }, { 0x437, 0x08 },
|
||||
{ 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x07 }, { 0x43f, 0x08 },
|
||||
{ 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, { 0x444, 0x10 },
|
||||
{ 0x445, 0x00 }, { 0x446, 0x00 }, { 0x447, 0x00 }, { 0x448, 0x00 },
|
||||
{ 0x449, 0xf0 }, { 0x44a, 0x0f }, { 0x44b, 0x3e }, { 0x44c, 0x10 },
|
||||
{ 0x44d, 0x00 }, { 0x44e, 0x00 }, { 0x44f, 0x00 }, { 0x450, 0x00 },
|
||||
{ 0x451, 0xf0 }, { 0x452, 0x0f }, { 0x453, 0x00 }, { 0x456, 0x5e },
|
||||
{ 0x460, 0x66 }, { 0x461, 0x66 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 },
|
||||
{ 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 },
|
||||
{ 0x501, 0xa2 }, { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 },
|
||||
{ 0x505, 0xa3 }, { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b },
|
||||
{ 0x509, 0xa4 }, { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f },
|
||||
{ 0x50d, 0xa4 }, { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c },
|
||||
{ 0x514, 0x0a }, { 0x516, 0x0a }, { 0x525, 0x4f }, { 0x550, 0x10 },
|
||||
{ 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55c, 0x50 }, { 0x55d, 0xff },
|
||||
{ 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, { 0x620, 0xff },
|
||||
{ 0x621, 0xff }, { 0x622, 0xff }, { 0x623, 0xff }, { 0x624, 0xff },
|
||||
{ 0x625, 0xff }, { 0x626, 0xff }, { 0x627, 0xff }, { 0x638, 0x50 },
|
||||
{ 0x63c, 0x0a }, { 0x63d, 0x0a }, { 0x63e, 0x0e }, { 0x63f, 0x0e },
|
||||
{ 0x640, 0x40 }, { 0x642, 0x40 }, { 0x643, 0x00 }, { 0x652, 0xc8 },
|
||||
{ 0x66e, 0x05 }, { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 },
|
||||
{ 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 },
|
||||
{ 0x70b, 0x87 }, { 0x765, 0x18 }, { 0x76e, 0x04 }
|
||||
};
|
||||
|
||||
static const uint16_t rtl8723b_bb_regs[] = {
|
||||
0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 0x820, 0x824,
|
||||
0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 0x848, 0x84c,
|
||||
0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 0x86c, 0x870, 0x874,
|
||||
0x878, 0x87c, 0x880, 0x884, 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c,
|
||||
0x900, 0x904, 0x908, 0x90c, 0x910, 0x914, 0xa00, 0xa04, 0xa08, 0xa0c,
|
||||
0xa10, 0xa14, 0xa18, 0xa1c, 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74,
|
||||
0xa78, 0xa7c, 0xa80, 0xb2c, 0xc00, 0xc04, 0xc08, 0xc0c, 0xc10, 0xc14,
|
||||
0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c,
|
||||
0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64,
|
||||
0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c,
|
||||
0xc90, 0xc94, 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4,
|
||||
0xcb8, 0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc,
|
||||
0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 0xd14,
|
||||
0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c,
|
||||
0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74,
|
||||
0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30,
|
||||
0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58,
|
||||
0xe5c, 0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84,
|
||||
0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xf14, 0xf4c,
|
||||
0xf00, 0x820, 0x800
|
||||
};
|
||||
|
||||
static const uint32_t rtl8723b_bb_vals[] = {
|
||||
0x80040000, 0x00000003, 0x0000fc00, 0x0000000a, 0x10001331, 0x020c3d10,
|
||||
0x02200385, 0x00000000, 0x01000100, 0x00190204, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a11a9, 0x01000014,
|
||||
0x66f60110, 0x061f0649, 0x00000000, 0x27272700, 0x07000760, 0x25004000,
|
||||
0x00000808, 0x00000000, 0xb0000c1c, 0x00000001, 0x00000000, 0xccc000c0,
|
||||
0x00000800, 0xfffffffe, 0x40302010, 0x00706050, 0x00000000, 0x00000023,
|
||||
0x00000000, 0x81121111, 0x00000002, 0x00000201, 0x00d047c8, 0x80ff800c,
|
||||
0x8c838300, 0x2e7f120f, 0x9500bb78, 0x1114d028, 0x00881117, 0x89140f00,
|
||||
0x1a1b0000, 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007,
|
||||
0x00000900, 0x225b0606, 0x21806490, 0x00000000, 0x48071d40, 0x03a05611,
|
||||
0x000000e4, 0x6c6c6c6c, 0x08800000, 0x40000100, 0x08800000, 0x40000100,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x69e9ac44, 0x469652af,
|
||||
0x49795994, 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f,
|
||||
0x69553420, 0x43bc0094, 0x00013149, 0x00250492, 0x00000000, 0x7112848b,
|
||||
0x47c00bff, 0x00000036, 0x2c7f000d, 0x020610db, 0x0000001f, 0x00b91612,
|
||||
0x390000e4, 0x20f60000, 0x40000100, 0x20200000, 0x00020e1a, 0x00000000,
|
||||
0x00020e1a, 0x00007f7f, 0x00000000, 0x000300a0, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 0x00766932,
|
||||
0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 0x00000740, 0x40020401,
|
||||
0x0000907f, 0x20010201, 0xa0633333, 0x3333bc53, 0x7a8f5b6f, 0xcc979975,
|
||||
0x00000000, 0x80608000, 0x00000000, 0x00127353, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x6437140a, 0x00000000, 0x00000282, 0x30032064,
|
||||
0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220,
|
||||
0x000e3c24, 0x2d2d2d2d, 0x2d2d2d2d, 0x0390272d, 0x2d2d2d2d, 0x2d2d2d2d,
|
||||
0x2d2d2d2d, 0x2d2d2d2d, 0x00000000, 0x1000dc1f, 0x10008c1f, 0x02140102,
|
||||
0x681604c2, 0x01007c00, 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f,
|
||||
0x10008c1f, 0x02140102, 0x28160d05, 0x00000008, 0x001b2556, 0x00c00096,
|
||||
0x00c00096, 0x01000056, 0x01000014, 0x01000056, 0x01000014, 0x00c00096,
|
||||
0x01000056, 0x00c00096, 0x00c00096, 0x00c00096, 0x00c00096, 0x000000d6,
|
||||
0x000000d6, 0x01c00016, 0x00000003, 0x00000000, 0x00000300, 0x01000100,
|
||||
0x83040000
|
||||
};
|
||||
|
||||
static const struct rtwn_bb_prog rtl8723b_bb[] = {
|
||||
{
|
||||
nitems(rtl8723b_bb_regs),
|
||||
rtl8723b_bb_regs,
|
||||
rtl8723b_bb_vals,
|
||||
{ 0 },
|
||||
NULL
|
||||
}
|
||||
};
|
||||
|
||||
static const uint32_t rtl8723b_agc_vals[] = {
|
||||
0xfd000001, 0xfc010001, 0xfb020001, 0xfa030001, 0xf9040001, 0xf8050001,
|
||||
0xf7060001, 0xf6070001, 0xf5080001, 0xf4090001, 0xf30a0001, 0xf20b0001,
|
||||
0xf10c0001, 0xf00d0001, 0xef0e0001, 0xee0f0001, 0xed100001, 0xec110001,
|
||||
0xeb120001, 0xea130001, 0xe9140001, 0xe8150001, 0xe7160001, 0xe6170001,
|
||||
0xe5180001, 0xe4190001, 0xe31a0001, 0xa51b0001, 0xa41c0001, 0xa31d0001,
|
||||
0x671e0001, 0x661f0001, 0x65200001, 0x64210001, 0x63220001, 0x4a230001,
|
||||
0x49240001, 0x48250001, 0x47260001, 0x46270001, 0x45280001, 0x44290001,
|
||||
0x432a0001, 0x422b0001, 0x292c0001, 0x282d0001, 0x272e0001, 0x262f0001,
|
||||
0x0a300001, 0x09310001, 0x08320001, 0x07330001, 0x06340001, 0x05350001,
|
||||
0x04360001, 0x03370001, 0x02380001, 0x01390001, 0x013a0001, 0x013b0001,
|
||||
0x013c0001, 0x013d0001, 0x013e0001, 0x013f0001, 0xfc400001, 0xfb410001,
|
||||
0xfa420001, 0xf9430001, 0xf8440001, 0xf7450001, 0xf6460001, 0xf5470001,
|
||||
0xf4480001, 0xf3490001, 0xf24a0001, 0xf14b0001, 0xf04c0001, 0xef4d0001,
|
||||
0xee4e0001, 0xed4f0001, 0xec500001, 0xeb510001, 0xea520001, 0xe9530001,
|
||||
0xe8540001, 0xe7550001, 0xe6560001, 0xe5570001, 0xe4580001, 0xe3590001,
|
||||
0xa65a0001, 0xa55b0001, 0xa45c0001, 0xa35d0001, 0x675e0001, 0x665f0001,
|
||||
0x65600001, 0x64610001, 0x63620001, 0x62630001, 0x61640001, 0x48650001,
|
||||
0x47660001, 0x46670001, 0x45680001, 0x44690001, 0x436a0001, 0x426b0001,
|
||||
0x286c0001, 0x276d0001, 0x266e0001, 0x256f0001, 0x24700001, 0x09710001,
|
||||
0x08720001, 0x07730001, 0x06740001, 0x05750001, 0x04760001, 0x03770001,
|
||||
0x02780001, 0x01790001, 0x017a0001, 0x017b0001, 0x017c0001, 0x017d0001,
|
||||
0x017e0001, 0x017f0001
|
||||
};
|
||||
|
||||
static const struct rtwn_agc_prog rtl8723b_agc[] = {
|
||||
{
|
||||
nitems(rtl8723b_agc_vals),
|
||||
rtl8723b_agc_vals,
|
||||
{ 0 },
|
||||
NULL
|
||||
}
|
||||
};
|
||||
|
||||
static const uint8_t rtl8723b_rf_regs[] = {
|
||||
0x000, 0x0b0, 0x0fe, 0x0fe, 0x0fe, 0x0b1, 0x0fe, 0x0fe, 0x0fe, 0x0b2,
|
||||
0x0b5, 0x0b6, 0x0b7, 0x0b8, 0x05c, 0x07c, 0x07e, 0x08b, 0x0b0, 0x01c,
|
||||
0x01e, 0x0df, 0x050,
|
||||
|
||||
/*
|
||||
* The vendor driver has a condition here that sets this to 0x0006b10e
|
||||
* if the package type is TFBGA90, TFBGA80 or TFBGA79.
|
||||
*
|
||||
* However, it seems to never actually read the package type from the
|
||||
* ROM, so in practice this is always ignored.
|
||||
*/
|
||||
0x051,
|
||||
|
||||
0x052, 0x053, 0x054, 0x055, 0x0dd, 0x070,
|
||||
|
||||
/* Same here. */
|
||||
0x071,
|
||||
|
||||
0x072, 0x073, 0x074, 0x075, 0x0ef, 0x034, 0x035, 0x034, 0x035, 0x034,
|
||||
0x035, 0x034, 0x035, 0x034, 0x035, 0x034, 0x035, 0x034, 0x035, 0x034,
|
||||
0x035, 0x034, 0x035, 0x034, 0x035, 0x034, 0x035, 0x0ef, 0x0ef, 0x0ed,
|
||||
0x044, 0x044, 0x044, 0x044, 0x044, 0x044, 0x044, 0x044, 0x044, 0x044,
|
||||
0x044, 0x0ef, 0x0ed, 0x07f, 0x0ef, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b,
|
||||
0x03b, 0x03b, 0x03b, 0x0ef, 0x0ed, 0x040, 0x040, 0x040, 0x040, 0x040,
|
||||
0x040, 0x040, 0x040, 0x0ed, 0x082, 0x083, 0x084, 0x085, 0x0a2, 0x0a3,
|
||||
0x0a4, 0x0a5, 0x0ed, 0x0ef, 0x056, 0x076, 0x001
|
||||
};
|
||||
|
||||
static const uint32_t rtl8723b_rf_vals[] = {
|
||||
0x00010000, 0x000dffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000018,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00084c00, 0x0000d2cc, 0x000925aa,
|
||||
0x00000010, 0x0000907f, 0x00000002, 0x00000002, 0x00000005, 0x0006fc00,
|
||||
0x000ff9f0, 0x000739d2, 0x00000000, 0x00000780, 0x00067435,
|
||||
|
||||
0x0006b04e,
|
||||
|
||||
0x000007D2, 0x00000000, 0x00050400, 0x0004026E, 0x0000004C, 0x00067435,
|
||||
|
||||
0x0006b04e,
|
||||
|
||||
0x000007d2, 0x00000000, 0x00050400, 0x0004026e, 0x00000100, 0x0000add7,
|
||||
0x00005c00, 0x00009dd4, 0x00005000, 0x00008dd1, 0x00004400, 0x00007dce,
|
||||
0x00003800, 0x00006cd1, 0x00004400, 0x00005cce, 0x00003800, 0x000048ce,
|
||||
0x00004400, 0x000034ce, 0x00003800, 0x00002451, 0x00004400, 0x0000144e,
|
||||
0x00003800, 0x00000051, 0x00004400, 0x00000000, 0x00000100, 0x00000010,
|
||||
0x0000add7, 0x00009dd4, 0x00008dd1, 0x00007dce, 0x00006cc1, 0x00005cce,
|
||||
0x000044d1, 0x000034ce, 0x00002451, 0x0000144e, 0x00000051, 0x00000000,
|
||||
0x00000000, 0x00020080, 0x00002000, 0x000380ef, 0x000302fe, 0x00028ce6,
|
||||
0x000200bc, 0x000188a5, 0x00010fbc, 0x00008f71, 0x00000900, 0x00000000,
|
||||
0x00000001, 0x000380ef, 0x000302fe, 0x00028ce6, 0x000200bc, 0x000188a5,
|
||||
0x00010fbc, 0x00008f71, 0x00000900, 0x00000000, 0x00080000, 0x00008000,
|
||||
0x00048d80, 0x00068000, 0x00080000, 0x00008000, 0x00048d80, 0x00068000,
|
||||
0x00000002, 0x00000002, 0x00000032, 0x00000032, 0x00000780
|
||||
};
|
||||
|
||||
static const struct rtwn_rf_prog rtl8723b_rf[] = {
|
||||
{
|
||||
nitems(rtl8723b_rf_regs),
|
||||
rtl8723b_rf_regs,
|
||||
rtl8723b_rf_vals,
|
||||
{ 0 },
|
||||
NULL
|
||||
},
|
||||
{ 0, NULL, NULL, { 0 }, NULL }
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_REG_H
|
||||
#define R23B_REG_H
|
||||
|
||||
#define R23B_BTCOEX_TABLE(i) (0x6c0 + (i) * 4)
|
||||
#define R23B_GNT_BT 0x764
|
||||
#define R23B_ANT_SEL 0x948
|
||||
|
||||
/* Bits for R92C_EFUSE_TEST. */
|
||||
#define R23B_EFUSE_TEST_SEL_M 0x300
|
||||
#define R23B_EFUSE_TEST_SEL_S 8
|
||||
#define R23B_EFUSE_TEST_SEL_WIFI 0
|
||||
#define R23B_EFUSE_TEST_SEL_BT0 1
|
||||
#define R23B_EFUSE_TEST_SEL_BT1 2
|
||||
#define R23B_EFUSE_TEST_SEL_BT2 3
|
||||
#define R23B_EFUSE_TEST_PGMEN 0x800
|
||||
|
||||
/* Bits for R92C_PWR_DATA. */
|
||||
#define R23B_PWR_DATA_RFE_CTRL_EN 0x800
|
||||
|
||||
/* Bits for R92C_LEDCFG0. */
|
||||
#define R23B_LEDCFG0_DPDT_SEL_EN 0x800000
|
||||
|
||||
/* Bits for R92C_LEDCFG2. */
|
||||
#define R23B_LEDCFG2_LED_SW_CTRL 0x20
|
||||
#define R23B_LEDCFG2_LED_DISABLE 0x04
|
||||
#define R23B_LEDCFG2_LED_M 0x7f
|
||||
|
||||
/* Bits for R88E_BB_PAD_CTRL. */
|
||||
#define R23B_BB_PAD_CTRL_DPDT_SEL_DATA 0x1
|
||||
|
||||
/* Bits for R92C_RXDMA_AGG_PG_TH. */
|
||||
#define R23B_RXDMA_AGG_PG_TH_EN 0x80000000
|
||||
#define R23B_RXDMA_AGG_PG_TH_SIZE_M 0xf
|
||||
#define R23B_RXDMA_AGG_PG_TH_SIZE_S 0
|
||||
#define R23B_RXDMA_AGG_PG_TH_TIME_M 0xff00
|
||||
#define R23B_RXDMA_AGG_PG_TH_TIME_S 8
|
||||
|
||||
/* Bits for R92C_FWHW_TXQ_CTRL. */
|
||||
#define R23B_FWHW_TXQ_CTRL_ACK_MGNT 0x1000
|
||||
|
||||
/* Bits for R92C_WMAC_TRXPTCL_CTL. */
|
||||
#define R23B_WMAC_TRXPTCL_CTL_HT40 0x80
|
||||
#define R23B_WMAC_TRXPTCL_CTL_VHT80 0x100
|
||||
|
||||
/* Bits for R23B_ANT_SEL. */
|
||||
#define R23B_ANT_SEL_S0 0x000
|
||||
#define R23B_ANT_SEL_S1 0x280
|
||||
|
||||
/*
|
||||
* RF (6052) registers.
|
||||
*/
|
||||
#define R23B_RF_S0S1 0xb0
|
||||
|
||||
/* Bits for R92C_RF_CHNLBW. */
|
||||
#define R23B_RF_CHNLBW_BW40 0x00400
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,87 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
|
||||
void
|
||||
r23b_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
rtwn_write_4(sc, R92C_LSSI_PARAM(chain),
|
||||
SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));
|
||||
|
||||
/*
|
||||
* The vendor driver claims that writing to 0xb6 may fail under high
|
||||
* temperature conditions, but only attempts to retry during RF init.
|
||||
*
|
||||
* It is not mentioned why 0xb2 is also special.
|
||||
*/
|
||||
switch (addr) {
|
||||
case 0xb6:
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
reg = rtwn_rf_read(sc, chain, addr);
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
for (int retry = 0; (reg & ~0xff) != (val & ~0xff) &&
|
||||
retry < 6; retry++) {
|
||||
rtwn_write_4(sc, R92C_LSSI_PARAM(chain),
|
||||
SM(R88E_LSSI_PARAM_ADDR, addr) |
|
||||
SM(R92C_LSSI_PARAM_DATA, val));
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
reg = rtwn_rf_read(sc, chain, addr);
|
||||
}
|
||||
break;
|
||||
case 0xb2:
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
reg = rtwn_rf_read(sc, chain, addr);
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
for (int retry = 0; reg != val && retry < 6; retry++) {
|
||||
rtwn_write_4(sc, R92C_LSSI_PARAM(chain),
|
||||
SM(R88E_LSSI_PARAM_ADDR, addr) |
|
||||
SM(R92C_LSSI_PARAM_DATA, val));
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
rtwn_rf_write(sc, chain, R92C_RF_CHNLBW, 0x0fc07);
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
reg = rtwn_rf_read(sc, chain, addr);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,133 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
#include <dev/rtwn/rtl8192c/r92c_rom_defs.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_reg.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_var.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_rom_image.h>
|
||||
|
||||
#include <dev/rtwn/rtl8812a/r12a_rom_image.h>
|
||||
|
||||
int
|
||||
r23b_efuse_preread(struct rtwn_softc *sc)
|
||||
{
|
||||
int error;
|
||||
|
||||
/* Switch to the WIFI bank. */
|
||||
error = rtwn_setbits_4(sc, R92C_EFUSE_TEST, R23B_EFUSE_TEST_SEL_M,
|
||||
SM(R23B_EFUSE_TEST_SEL, R23B_EFUSE_TEST_SEL_WIFI));
|
||||
if (error != 0)
|
||||
return (error);
|
||||
|
||||
/* NB: Vendor driver does this on every read. */
|
||||
error = rtwn_setbits_2(sc, R92C_EFUSE_TEST, R23B_EFUSE_TEST_PGMEN, 0);
|
||||
return (error);
|
||||
}
|
||||
|
||||
void
|
||||
r23b_parse_rom(struct rtwn_softc *sc, uint8_t *buf)
|
||||
{
|
||||
struct r23b_rom *rom = (struct r23b_rom *)buf;
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
|
||||
for (int i = 0; i < sc->ntxchains; i++) {
|
||||
struct r23b_tx_pwr_2g *pwr_2g = &rom->tx_pwr[i].pwr_2g;
|
||||
struct r23b_tx_pwr_diff_2g *pwr_diff_2g =
|
||||
&rom->tx_pwr[i].pwr_diff_2g;
|
||||
int j;
|
||||
|
||||
for (j = 0; j < R23B_GROUP_2G - 1; j++) {
|
||||
rs->super.cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(
|
||||
pwr_2g->cck[j], R23B_DEF_TX_PWR_2G);
|
||||
rs->super.ht40_tx_pwr_2g[i][j] =
|
||||
RTWN_GET_ROM_VAR(pwr_2g->ht40[j],
|
||||
R23B_DEF_TX_PWR_2G);
|
||||
}
|
||||
rs->super.cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j],
|
||||
R23B_DEF_TX_PWR_2G);
|
||||
|
||||
rs->super.cck_tx_pwr_diff_2g[i][0] = 0;
|
||||
rs->super.bw40_tx_pwr_diff_2g[i][0] = 0;
|
||||
if (pwr_diff_2g->ht20_ofdm == 0xff) {
|
||||
rs->super.ofdm_tx_pwr_diff_2g[i][0] =
|
||||
R23B_DEF_TX_OFDM_DIFF;
|
||||
rs->super.bw20_tx_pwr_diff_2g[i][0] =
|
||||
R23B_DEF_TX_HT20_DIFF;
|
||||
} else {
|
||||
rs->super.ofdm_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8(
|
||||
MS(pwr_diff_2g->ht20_ofdm, LOW_PART));
|
||||
rs->super.bw20_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8(
|
||||
MS(pwr_diff_2g->ht20_ofdm, HIGH_PART));
|
||||
}
|
||||
|
||||
for (j = 1; j < R23B_MAX_TX_COUNT; j++) {
|
||||
struct r23b_tx_pwr_diff123_2g *diff =
|
||||
&pwr_diff_2g->diff123[j - 1];
|
||||
|
||||
if (diff->ofdm_cck == 0xff) {
|
||||
rs->super.ofdm_tx_pwr_diff_2g[i][j] =
|
||||
rs->super.cck_tx_pwr_diff_2g[i][j] =
|
||||
R23B_DEF_TX_DIFF;
|
||||
} else {
|
||||
rs->super.cck_tx_pwr_diff_2g[i][j] =
|
||||
RTWN_SIGN4TO8(MS(diff->ofdm_cck, LOW_PART));
|
||||
rs->super.ofdm_tx_pwr_diff_2g[i][j] =
|
||||
RTWN_SIGN4TO8(
|
||||
MS(diff->ofdm_cck, HIGH_PART));
|
||||
}
|
||||
|
||||
if (diff->ht40_ht20 == 0xff) {
|
||||
rs->super.bw40_tx_pwr_diff_2g[i][j] =
|
||||
rs->super.bw20_tx_pwr_diff_2g[i][j] =
|
||||
R23B_DEF_TX_DIFF;
|
||||
} else {
|
||||
rs->super.bw40_tx_pwr_diff_2g[i][j] =
|
||||
RTWN_SIGN4TO8(
|
||||
MS(diff->ht40_ht20, HIGH_PART));
|
||||
rs->super.bw20_tx_pwr_diff_2g[i][j] =
|
||||
RTWN_SIGN4TO8(
|
||||
MS(diff->ht40_ht20, LOW_PART));
|
||||
}
|
||||
}
|
||||
|
||||
rs->bt_antnum = rom->rf_bt_opt & R12A_RF_BT_OPT_ANT_NUM;
|
||||
}
|
||||
|
||||
rs->super.crystalcap = RTWN_GET_ROM_VAR(rom->crystal_cap,
|
||||
R23B_ROM_CRYSTALCAP_DEF);
|
||||
|
||||
sc->thermal_meter = RTWN_GET_ROM_VAR(rom->thermal_meter,
|
||||
R23B_ROM_THERMALMETER_DEF);
|
||||
}
|
||||
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_ROM_DEFS_H
|
||||
#define R23B_ROM_DEFS_H
|
||||
|
||||
#define R23B_MAX_TX_COUNT 4
|
||||
#define R23B_MAX_RF_PATH 4
|
||||
#define R23B_GROUP_2G 6
|
||||
|
||||
#define R23B_EFUSE_MAX_LEN 512
|
||||
#define R23B_EFUSE_MAP_LEN 512
|
||||
|
||||
#endif /* R23B_ROM_DEFS_H */
|
||||
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_ROM_IMAGE_H
|
||||
#define R23B_ROM_IMAGE_H
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b_rom_defs.h>
|
||||
|
||||
#define R23B_DEF_TX_PWR_2G 0x2d
|
||||
#define R23B_DEF_TX_HT20_DIFF 0x02
|
||||
#define R23B_DEF_TX_OFDM_DIFF 0x04
|
||||
#define R23B_DEF_TX_DIFF 0xfe
|
||||
|
||||
struct r23b_tx_pwr_2g {
|
||||
uint8_t cck[R23B_GROUP_2G];
|
||||
uint8_t ht40[R23B_GROUP_2G - 1];
|
||||
} __packed;
|
||||
|
||||
struct r23b_tx_pwr_diff123_2g {
|
||||
uint8_t ht40_ht20;
|
||||
uint8_t ofdm_cck;
|
||||
} __packed;
|
||||
|
||||
struct r23b_tx_pwr_diff_2g {
|
||||
uint8_t ht20_ofdm;
|
||||
struct r23b_tx_pwr_diff123_2g diff123[R23B_MAX_TX_COUNT - 1];
|
||||
} __packed;
|
||||
|
||||
struct r23b_tx_pwr {
|
||||
struct r23b_tx_pwr_2g pwr_2g;
|
||||
struct r23b_tx_pwr_diff_2g pwr_diff_2g;
|
||||
uint8_t reserved[24];
|
||||
} __packed;
|
||||
|
||||
struct r23b_rom {
|
||||
uint16_t id;
|
||||
uint8_t reserved1[14];
|
||||
struct r23b_tx_pwr tx_pwr[R23B_MAX_RF_PATH];
|
||||
uint8_t channel_plan;
|
||||
uint8_t crystal_cap;
|
||||
#define R23B_ROM_CRYSTALCAP_DEF 0x20
|
||||
|
||||
uint8_t thermal_meter;
|
||||
#define R23B_ROM_THERMALMETER_DEF 0x18
|
||||
|
||||
uint8_t iqk_lck;
|
||||
uint8_t pa_type;
|
||||
uint8_t lna_type_2g;
|
||||
uint8_t reserved2;
|
||||
uint8_t lna_type_5g;
|
||||
uint8_t reserved3;
|
||||
uint8_t rf_board_opt;
|
||||
uint8_t rf_feature_opt;
|
||||
uint8_t rf_bt_opt;
|
||||
uint8_t version;
|
||||
uint8_t customer_id;
|
||||
uint8_t tx_bswing_2g;
|
||||
uint8_t reserved4;
|
||||
uint8_t tx_pwr_calib_rate;
|
||||
uint8_t rf_antenna_opt;
|
||||
uint8_t rfe_opt;
|
||||
uint8_t country_code;
|
||||
|
||||
struct {
|
||||
uint8_t reserved1[52];
|
||||
uint16_t vid;
|
||||
uint16_t pid;
|
||||
uint8_t reserved2[3];
|
||||
uint8_t macaddr[IEEE80211_ADDR_LEN];
|
||||
uint8_t reserved3[243];
|
||||
} __packed usb;
|
||||
} __packed;
|
||||
|
||||
_Static_assert(sizeof(struct r23b_rom) == R23B_EFUSE_MAP_LEN,
|
||||
"R23B_EFUSE_MAP_LEN must be equal to sizeof(struct r23b_rom)!");
|
||||
|
||||
#endif /* R23B_ROM_IMAGE_H */
|
||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e_rx_desc.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
|
||||
int8_t
|
||||
r23b_get_rssi_cck(struct rtwn_softc *sc, void *physt)
|
||||
{
|
||||
struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt;
|
||||
int8_t lna_idx, vga_idx, rssi;
|
||||
|
||||
lna_idx = (phy->agc_rpt & 0xe0) >> 5;
|
||||
vga_idx = (phy->agc_rpt & 0x1f);
|
||||
|
||||
rssi = -2 * vga_idx;
|
||||
switch (lna_idx) {
|
||||
case 6:
|
||||
rssi -= 34;
|
||||
break;
|
||||
case 4:
|
||||
rssi -= 14;
|
||||
break;
|
||||
case 1:
|
||||
rssi += 6;
|
||||
break;
|
||||
case 0:
|
||||
rssi += 16;
|
||||
break;
|
||||
default:
|
||||
rssi = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
return (rssi);
|
||||
}
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef R23B_VAR_H
|
||||
#define R23B_VAR_H
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b_rom_defs.h>
|
||||
|
||||
struct r23b_softc {
|
||||
struct r92e_softc super;
|
||||
|
||||
uint8_t bt_antnum;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#ifndef RTL8723BU_H
|
||||
#define RTL8723BU_H
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
|
||||
/* r23bu_init.c */
|
||||
int r23bu_power_on(struct rtwn_softc *);
|
||||
void r23bu_power_off(struct rtwn_softc *);
|
||||
void r23bu_init_bb(struct rtwn_softc *);
|
||||
void r23bu_init_ampdu(struct rtwn_softc *);
|
||||
void r23bu_init_rx_agg(struct rtwn_softc *sc);
|
||||
|
||||
/* r23bu_rom.c */
|
||||
void r23bu_parse_rom(struct rtwn_softc *, uint8_t *);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,197 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
#include <dev/rtwn/if_rtwn_nop.h>
|
||||
|
||||
#include <dev/rtwn/usb/rtwn_usb_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c.h>
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/usb/r92cu.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e.h>
|
||||
#include <dev/rtwn/rtl8192e/r92e_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_var.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_priv.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/usb/r23bu.h>
|
||||
|
||||
#include <dev/rtwn/rtl8812a/r12a_tx_desc.h>
|
||||
|
||||
#include <dev/rtwn/rtl8812a/usb/r12au.h>
|
||||
|
||||
#include <dev/rtwn/rtl8821a/r21a_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8821a/usb/r21au.h>
|
||||
|
||||
void r23bu_attach(struct rtwn_usb_softc *);
|
||||
|
||||
static void
|
||||
r23bu_attach_private(struct rtwn_softc *sc)
|
||||
{
|
||||
struct r23b_softc *rs;
|
||||
|
||||
sc->sc_priv = rs = malloc(sizeof(struct r23b_softc),
|
||||
M_RTWN_PRIV, M_WAITOK | M_ZERO);
|
||||
|
||||
rs->super.ac_usb_dma_size = 0x3;
|
||||
rs->super.ac_usb_dma_time = 0x20;
|
||||
}
|
||||
|
||||
static void
|
||||
r23bu_detach_private(struct rtwn_softc *sc)
|
||||
{
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
|
||||
free(rs, M_RTWN_PRIV);
|
||||
}
|
||||
|
||||
void
|
||||
r23bu_attach(struct rtwn_usb_softc *uc)
|
||||
{
|
||||
struct rtwn_softc *sc = &uc->uc_sc;
|
||||
|
||||
/* USB part. */
|
||||
uc->uc_align_rx = r12au_align_rx;
|
||||
uc->tx_agg_desc_num = 0x6;
|
||||
|
||||
/* Common part. */
|
||||
sc->sc_flags = RTWN_FLAG_EXT_HDR;
|
||||
|
||||
sc->sc_set_chan = r92e_set_chan;
|
||||
sc->sc_fill_tx_desc = r12a_fill_tx_desc;
|
||||
sc->sc_fill_tx_desc_raw = r12a_fill_tx_desc_raw;
|
||||
sc->sc_fill_tx_desc_null = r12a_fill_tx_desc_null;
|
||||
sc->sc_dump_tx_desc = r12au_dump_tx_desc;
|
||||
sc->sc_tx_radiotap_flags = r12a_tx_radiotap_flags;
|
||||
sc->sc_rx_radiotap_flags = r12a_rx_radiotap_flags;
|
||||
sc->sc_get_rx_stats = r12a_get_rx_stats;
|
||||
sc->sc_get_rssi_cck = r23b_get_rssi_cck;
|
||||
sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm;
|
||||
sc->sc_classify_intr = r12au_classify_intr;
|
||||
sc->sc_handle_tx_report = r12a_ratectl_tx_complete;
|
||||
sc->sc_handle_tx_report2 = rtwn_nop_softc_uint8_int;
|
||||
sc->sc_handle_c2h_report = r92e_handle_c2h_report;
|
||||
sc->sc_check_frame = rtwn_nop_int_softc_mbuf;
|
||||
sc->sc_rf_read = r92e_rf_read;
|
||||
sc->sc_rf_write = r23b_rf_write;
|
||||
sc->sc_check_condition = r92c_check_condition;
|
||||
sc->sc_efuse_postread = rtwn_nop_softc;
|
||||
sc->sc_efuse_preread = r23b_efuse_preread;
|
||||
sc->sc_parse_rom = r23bu_parse_rom;
|
||||
sc->sc_set_led = r23b_set_led;
|
||||
sc->sc_power_on = r23bu_power_on;
|
||||
sc->sc_power_off = r23bu_power_off;
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
sc->sc_fw_reset = r23b_fw_reset;
|
||||
sc->sc_fw_download_enable = r23b_fw_download_enable;
|
||||
#endif
|
||||
sc->sc_llt_init = r92e_llt_init;
|
||||
sc->sc_set_page_size = r23b_set_page_size;
|
||||
sc->sc_lc_calib = r23b_lc_calib;
|
||||
sc->sc_iq_calib = r23b_iq_calib;
|
||||
sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32;
|
||||
sc->sc_adj_devcaps = rtwn_nop_softc;
|
||||
sc->sc_vap_preattach = rtwn_nop_softc_vap;
|
||||
sc->sc_postattach = rtwn_nop_softc;
|
||||
sc->sc_detach_private = r23bu_detach_private;
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
sc->sc_set_media_status = r12a_set_media_status;
|
||||
sc->sc_set_rsvd_page = r88e_set_rsvd_page;
|
||||
sc->sc_set_pwrmode = r12a_set_pwrmode;
|
||||
sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO */
|
||||
#else
|
||||
sc->sc_set_media_status = rtwn_nop_softc_int;
|
||||
#endif
|
||||
sc->sc_beacon_init = r12a_beacon_init;
|
||||
sc->sc_beacon_enable = r92c_beacon_enable;
|
||||
sc->sc_sta_beacon_enable = r12a_sta_beacon_enable;
|
||||
sc->sc_beacon_set_rate = r12a_beacon_set_rate;
|
||||
sc->sc_beacon_select = r21a_beacon_select;
|
||||
sc->sc_temp_measure = r23b_temp_measure;
|
||||
sc->sc_temp_read = r88e_temp_read;
|
||||
sc->sc_init_tx_agg = r21au_init_tx_agg;
|
||||
sc->sc_init_rx_agg = r23bu_init_rx_agg;
|
||||
sc->sc_init_ampdu = r23bu_init_ampdu;
|
||||
sc->sc_init_intr = r92cu_init_intr;
|
||||
sc->sc_init_edca = r92c_init_edca;
|
||||
sc->sc_init_bb = r23bu_init_bb;
|
||||
sc->sc_init_rf = r23b_init_rf;
|
||||
sc->sc_init_antsel = r23b_init_antsel;
|
||||
sc->sc_post_init = r23b_post_init;
|
||||
sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc;
|
||||
sc->sc_set_tx_power = r92e_set_tx_power;
|
||||
|
||||
sc->mac_prog = &rtl8723b_mac[0];
|
||||
sc->mac_size = nitems(rtl8723b_mac);
|
||||
sc->bb_prog = &rtl8723b_bb[0];
|
||||
sc->bb_size = nitems(rtl8723b_bb);
|
||||
sc->agc_prog = &rtl8723b_agc[0];
|
||||
sc->agc_size = nitems(rtl8723b_agc);
|
||||
sc->rf_prog = &rtl8723b_rf[0];
|
||||
|
||||
sc->name = "RTL8723BU";
|
||||
sc->fwname = "rtwn-rtl8723bufw";
|
||||
sc->fwsig = 0x530;
|
||||
|
||||
sc->page_count = R23B_TX_PAGE_COUNT;
|
||||
sc->pktbuf_count = 0; /* Unused */
|
||||
sc->ackto = 0x40;
|
||||
|
||||
sc->npubqpages = R23B_PUBQ_NPAGES;
|
||||
sc->nhqpages = R23B_HPQ_NPAGES;
|
||||
sc->nlqpages = R23B_LPQ_NPAGES;
|
||||
sc->nnqpages = R23B_NPQ_NPAGES;
|
||||
|
||||
sc->page_size = R92C_TX_PAGE_SIZE;
|
||||
sc->txdesc_len = sizeof(struct r12a_tx_desc);
|
||||
sc->efuse_maxlen = R23B_EFUSE_MAX_LEN;
|
||||
sc->efuse_maplen = R23B_EFUSE_MAP_LEN;
|
||||
sc->rx_dma_size = R23B_RX_DMA_BUFFER_SIZE;
|
||||
|
||||
sc->macid_limit = R12A_MACID_MAX + 1;
|
||||
sc->macid_rpt2_max_num = 2;
|
||||
sc->cam_entry_limit = R12A_CAM_ENTRY_COUNT;
|
||||
sc->fwsize_limit = R12A_MAX_FW_SIZE;
|
||||
sc->temp_delta = R23B_CALIB_THRESHOLD;
|
||||
|
||||
sc->bcn_status_reg[0] = R92C_TDECTRL;
|
||||
sc->bcn_status_reg[1] = R21A_DWBCN1_CTRL;
|
||||
sc->rcr = 0;
|
||||
|
||||
sc->ntxchains = 1;
|
||||
sc->nrxchains = 1;
|
||||
|
||||
r23bu_attach_private(sc);
|
||||
}
|
||||
@@ -0,0 +1,364 @@
|
||||
/*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*
|
||||
* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/usb/usb.h>
|
||||
#include <dev/usb/usbdi.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/usb/rtwn_usb_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8188e/r88e_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192c/r92c_reg.h>
|
||||
|
||||
#include <dev/rtwn/rtl8192e/r92e_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b_reg.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_var.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/usb/r23bu.h>
|
||||
|
||||
#include <dev/rtwn/rtl8812a/r12a_reg.h>
|
||||
|
||||
int
|
||||
r23bu_power_on(struct rtwn_softc *sc)
|
||||
{
|
||||
#define RTWN_CHK(res) do { \
|
||||
if (res != 0) \
|
||||
return (EIO); \
|
||||
} while(0)
|
||||
int ntries;
|
||||
|
||||
/* Clear suspend and power down bits.*/
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
|
||||
R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_APDM_HPDN, 0, 1));
|
||||
|
||||
/* Disable GPIO9 as EXT WAKEUP. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_GPIO_INTM + 2, 0x01, 0));
|
||||
|
||||
/* Enable WL suspend. */
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
|
||||
R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE, 0, 1));
|
||||
|
||||
/* Enable LDOA12 MACRO block for all interfaces. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_LDOA15_CTRL, 0, R92C_LDOA15_CTRL_EN));
|
||||
|
||||
/* Disable BT_GPS_SEL pins. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, 0x067, 0x10, 0));
|
||||
|
||||
/* 1 ms delay. */
|
||||
rtwn_delay(sc, 1000);
|
||||
|
||||
/* Release analog Ips to digital isolation. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_SYS_ISO_CTRL,
|
||||
R92C_SYS_ISO_CTRL_IP2MAC, 0));
|
||||
|
||||
/* Disable SW LPS and WL suspend. */
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
|
||||
R92C_APS_FSMCO_APFM_RSM |
|
||||
R92C_APS_FSMCO_AFSM_HSUS |
|
||||
R92C_APS_FSMCO_AFSM_PCIE, 0, 1));
|
||||
|
||||
/* Wait for power ready bit. */
|
||||
for (ntries = 0; ntries < 5000; ntries++) {
|
||||
if (rtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
|
||||
break;
|
||||
rtwn_delay(sc, 10);
|
||||
}
|
||||
if (ntries == 5000) {
|
||||
device_printf(sc->sc_dev,
|
||||
"timeout waiting for chip power up\n");
|
||||
return (ETIMEDOUT);
|
||||
}
|
||||
|
||||
/* Release WLON reset. */
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0,
|
||||
R92C_APS_FSMCO_RDY_MACON, 2));
|
||||
|
||||
/* Disable HWPDN. */
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
|
||||
R92C_APS_FSMCO_APDM_HPDN, 0, 1));
|
||||
|
||||
/* Disable WL suspend. */
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
|
||||
R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE, 0, 1));
|
||||
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0,
|
||||
R92C_APS_FSMCO_APFM_ONMAC, 1));
|
||||
for (ntries = 0; ntries < 5000; ntries++) {
|
||||
if (!(rtwn_read_2(sc, R92C_APS_FSMCO) &
|
||||
R92C_APS_FSMCO_APFM_ONMAC))
|
||||
break;
|
||||
rtwn_delay(sc, 10);
|
||||
}
|
||||
if (ntries == 5000)
|
||||
return (ETIMEDOUT);
|
||||
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_AFE_MISC, 0, 0x40));
|
||||
|
||||
/* Enable falling edge triggering interrupt. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_GPIO_INTM + 1, 0, 0x02));
|
||||
|
||||
/* Enable GPIO9 interrupt mode. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, 0x063, 0, 0x02));
|
||||
|
||||
/* Enable GPIO9 input mode. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, 0x062, 0x02, 0));
|
||||
|
||||
/* Enable HSISR GPIO interrupt. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_HSIMR, 0, 0x01));
|
||||
|
||||
/* Enable HSISR GPIO9 interrupt. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_HSIMR + 2, 0, 0x02));
|
||||
|
||||
/* GPIO9 internal pull up. */
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R92C_MULTI_FUNC_CTRL, 0, 0x08));
|
||||
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_MULTI_FUNC_CTRL, 0, 0x4000, 1));
|
||||
|
||||
/* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
|
||||
RTWN_CHK(rtwn_write_1(sc, R92C_CR, 0x00));
|
||||
RTWN_CHK(rtwn_setbits_2(sc, R92C_CR, 0,
|
||||
R92C_CR_HCI_TXDMA_EN | R92C_CR_TXDMA_EN |
|
||||
R92C_CR_HCI_RXDMA_EN | R92C_CR_RXDMA_EN |
|
||||
R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN |
|
||||
((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) |
|
||||
R92C_CR_CALTMR_EN));
|
||||
|
||||
/* btcoex power on. */
|
||||
|
||||
RTWN_CHK(rtwn_write_1(sc, R88E_BB_PAD_CTRL + 3, 0x20));
|
||||
RTWN_CHK(rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0,
|
||||
R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST));
|
||||
RTWN_CHK(rtwn_write_1(sc, R23B_GNT_BT + 1, 0x18));
|
||||
RTWN_CHK(rtwn_write_1(sc, 0x76e, 0x4));
|
||||
RTWN_CHK(rtwn_write_4(sc, R23B_ANT_SEL, R23B_ANT_SEL_S0));
|
||||
RTWN_CHK(rtwn_write_1(sc, 0xfe08, 0x1));
|
||||
|
||||
RTWN_CHK(rtwn_setbits_2(sc, R92C_PWR_DATA, 0,
|
||||
R23B_PWR_DATA_RFE_CTRL_EN));
|
||||
|
||||
RTWN_CHK(rtwn_setbits_4(sc, R92C_LEDCFG0, 0, R23B_LEDCFG0_DPDT_SEL_EN));
|
||||
|
||||
RTWN_CHK(rtwn_setbits_1(sc, R88E_BB_PAD_CTRL,
|
||||
R23B_BB_PAD_CTRL_DPDT_SEL_DATA, 0));
|
||||
|
||||
return (0);
|
||||
#undef RTWN_CHK
|
||||
}
|
||||
|
||||
void
|
||||
r23bu_power_off(struct rtwn_softc *sc)
|
||||
{
|
||||
int error, ntries;
|
||||
|
||||
/* Stop Tx report timer. */
|
||||
error = rtwn_setbits_1(sc, R88E_TX_RPT_CTRL, R88E_TX_RPT2_ENA, 0);
|
||||
if (error == ENXIO) /* hardware gone */
|
||||
return;
|
||||
|
||||
/* Stop Rx. */
|
||||
rtwn_write_4(sc, R92C_CR, 0x0000);
|
||||
|
||||
/* Move card to Low Power state. */
|
||||
/* Block all Tx queues. */
|
||||
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
|
||||
|
||||
for (ntries = 0; ntries < 10; ntries++) {
|
||||
/* Should be zero if no packet is transmitting. */
|
||||
if (rtwn_read_4(sc, R88E_SCH_TXCMD) == 0)
|
||||
break;
|
||||
|
||||
rtwn_delay(sc, 5000);
|
||||
}
|
||||
if (ntries == 10) {
|
||||
device_printf(sc->sc_dev, "%s: failed to block Tx queues\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
/* CCK and OFDM are disabled, and clock are gated. */
|
||||
rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BBRSTB, 0);
|
||||
|
||||
rtwn_delay(sc, 1);
|
||||
|
||||
/* Reset whole BB. */
|
||||
rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BB_GLB_RST, 0);
|
||||
|
||||
/* Reset MAC TRX. */
|
||||
rtwn_write_1(sc, R92C_CR, R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN);
|
||||
|
||||
/* check if removed later. (?) */
|
||||
rtwn_setbits_1_shift(sc, R92C_CR, R92C_CR_ENSEC, 0, 1);
|
||||
|
||||
/* Respond TxOK to scheduler */
|
||||
rtwn_setbits_1(sc, R92C_DUAL_TSF_RST, 0, R92C_DUAL_TSF_RST_TXOK);
|
||||
|
||||
#ifndef RTWN_WITHOUT_UCODE
|
||||
if ((sc->sc_flags & RTWN_FW_LOADED) &&
|
||||
(rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL))
|
||||
rtwn_fw_reset(sc, RTWN_FW_RESET_SHUTDOWN);
|
||||
#endif
|
||||
|
||||
/* Reset MCU. */
|
||||
rtwn_setbits_1_shift(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_CPUEN,
|
||||
0, 1);
|
||||
rtwn_write_1(sc, R92C_MCUFWDL, 0);
|
||||
|
||||
/* Move card to Disabled state. */
|
||||
/* Turn off RF. */
|
||||
rtwn_write_1(sc, R92C_RF_CTRL, 0);
|
||||
|
||||
/* Enable rising edge triggering interrupt. */
|
||||
rtwn_setbits_1(sc, R92C_GPIO_INTM + 1, 0x02, 0);
|
||||
|
||||
/* Release WLON reset. */
|
||||
rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0,
|
||||
R92C_APS_FSMCO_RDY_MACON, 2);
|
||||
|
||||
/* Turn off MAC by HW state machine */
|
||||
rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0, R92C_APS_FSMCO_APFM_OFF, 1);
|
||||
for (ntries = 0; ntries < 10; ntries++) {
|
||||
/* Wait until it will be disabled. */
|
||||
if ((rtwn_read_2(sc, R92C_APS_FSMCO) &
|
||||
R92C_APS_FSMCO_APFM_OFF) == 0)
|
||||
break;
|
||||
|
||||
rtwn_delay(sc, 5000);
|
||||
}
|
||||
if (ntries == 10) {
|
||||
device_printf(sc->sc_dev, "%s: could not turn off MAC\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
rtwn_setbits_1(sc, R92C_AFE_MISC, 0x40, 0);
|
||||
|
||||
/* Analog Ips to digital isolation. */
|
||||
rtwn_setbits_1(sc, R92C_SYS_ISO_CTRL, 0, R92C_SYS_ISO_CTRL_IP2MAC);
|
||||
|
||||
/* Disable LDOA12 MACRO block. */
|
||||
rtwn_setbits_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_EN, 0);
|
||||
|
||||
/* Enable WL suspend. */
|
||||
rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_AFSM_PCIE,
|
||||
R92C_APS_FSMCO_AFSM_HSUS, 1);
|
||||
|
||||
/* Enable GPIO9 as EXT WAKEUP. */
|
||||
rtwn_setbits_1(sc, R92C_GPIO_INTM + 2, 0, 0x01);
|
||||
}
|
||||
|
||||
void
|
||||
r23bu_init_bb(struct rtwn_softc *sc)
|
||||
{
|
||||
/* Enable BB and RF. */
|
||||
rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0, R92C_SYS_FUNC_EN_BBRSTB |
|
||||
R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_DIO_RF);
|
||||
|
||||
/* Select antenna S0. */
|
||||
rtwn_write_4(sc, R23B_ANT_SEL, R23B_ANT_SEL_S0);
|
||||
|
||||
return (r23b_init_bb_common(sc));
|
||||
}
|
||||
|
||||
void
|
||||
r23bu_init_rx_agg(struct rtwn_softc *sc)
|
||||
{
|
||||
struct r23b_softc *rs = sc->sc_priv;
|
||||
uint32_t val;
|
||||
|
||||
rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0, R92C_TRXDMA_CTRL_RXDMA_AGG_EN);
|
||||
|
||||
val = rtwn_read_4(sc, R92C_RXDMA_AGG_PG_TH);
|
||||
val = RW(val, R23B_RXDMA_AGG_PG_TH_SIZE, rs->super.ac_usb_dma_size);
|
||||
val = RW(val, R23B_RXDMA_AGG_PG_TH_TIME, rs->super.ac_usb_dma_time);
|
||||
val |= R23B_RXDMA_AGG_PG_TH_EN;
|
||||
rtwn_write_4(sc, R92C_RXDMA_AGG_PG_TH, val);
|
||||
}
|
||||
|
||||
void
|
||||
r23bu_init_ampdu(struct rtwn_softc *sc)
|
||||
{
|
||||
struct rtwn_usb_softc *uc = RTWN_USB_SOFTC(sc);
|
||||
uint8_t val;
|
||||
|
||||
val = rtwn_read_1(sc, R12A_RXDMA_PRO);
|
||||
val = RW(val, R12A_BURST_SZ,
|
||||
usbd_get_speed(uc->uc_udev) == USB_SPEED_HIGH ?
|
||||
R12A_BURST_SZ_USB2 : R12A_BURST_SZ_USB1);
|
||||
val |= R12A_DMA_MODE | SM(R12A_BURST_CNT, 3);
|
||||
rtwn_write_1(sc, R12A_RXDMA_PRO, val);
|
||||
|
||||
/* Enable single packet AMPDU. */
|
||||
rtwn_setbits_1(sc, R12A_HT_SINGLE_AMPDU, 0,
|
||||
R12A_HT_SINGLE_AMPDU_PKT_ENA);
|
||||
|
||||
rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0c14);
|
||||
rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, 0x5e);
|
||||
rtwn_write_4(sc, R12A_AMPDU_MAX_LENGTH, UINT32_MAX);
|
||||
|
||||
/*
|
||||
* The vendor driver says this is for
|
||||
* "VHT packet length 11K", but this chip
|
||||
* doesn't support VHT rates...
|
||||
*/
|
||||
rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18);
|
||||
|
||||
rtwn_write_1(sc, R92C_PIFS, 0);
|
||||
rtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW);
|
||||
rtwn_write_4(sc, R92C_FAST_EDCA_CTRL, 0x03086666);
|
||||
|
||||
rtwn_write_1(sc, R92C_USTIME_TSF, 0x50);
|
||||
rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50);
|
||||
|
||||
/* Do not reset MAC. */
|
||||
rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60);
|
||||
}
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (c) 2026 Ahmad Khalifa <vexeduxr@FreeBSD.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/mbuf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/taskqueue.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/linker.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_radiotap.h>
|
||||
|
||||
#include <dev/rtwn/if_rtwnreg.h>
|
||||
#include <dev/rtwn/if_rtwnvar.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/r23b.h>
|
||||
#include <dev/rtwn/rtl8723b/r23b_rom_image.h>
|
||||
|
||||
#include <dev/rtwn/rtl8723b/usb/r23bu.h>
|
||||
|
||||
void
|
||||
r23bu_parse_rom(struct rtwn_softc *sc, uint8_t *buf)
|
||||
{
|
||||
struct r23b_rom *rom = (struct r23b_rom *)buf;
|
||||
|
||||
r23b_parse_rom(sc, buf);
|
||||
IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->usb.macaddr);
|
||||
}
|
||||
@@ -115,6 +115,12 @@ struct r12a_tx_desc {
|
||||
#define R12A_TXDW5_RTS_PRIM_CHAN_M 0x0001e000
|
||||
#define R12A_TXDW5_RTS_PRIM_CHAN_S 13
|
||||
|
||||
/*
|
||||
* TODO: some chips (at least the 23bu)
|
||||
* let us pass arbitrary data in the first
|
||||
* 12 bits that is persisted through to the
|
||||
* TX report.
|
||||
*/
|
||||
uint32_t txdw6;
|
||||
#define R21A_TXDW6_MBSSID_M 0x0000f000
|
||||
#define R21A_TXDW6_MBSSID_S 12
|
||||
|
||||
@@ -21,6 +21,7 @@
|
||||
void r92cu_attach(struct rtwn_usb_softc *);
|
||||
void r92eu_attach(struct rtwn_usb_softc *);
|
||||
void r88eu_attach(struct rtwn_usb_softc *);
|
||||
void r23bu_attach(struct rtwn_usb_softc *);
|
||||
void r12au_attach(struct rtwn_usb_softc *);
|
||||
void r21au_attach(struct rtwn_usb_softc *);
|
||||
|
||||
@@ -28,6 +29,7 @@ enum {
|
||||
RTWN_CHIP_RTL8192CU,
|
||||
RTWN_CHIP_RTL8192EU,
|
||||
RTWN_CHIP_RTL8188EU,
|
||||
RTWN_CHIP_RTL8723BU,
|
||||
RTWN_CHIP_RTL8812AU,
|
||||
RTWN_CHIP_RTL8821AU,
|
||||
RTWN_CHIP_MAX_USB
|
||||
@@ -132,6 +134,14 @@ static const STRUCT_USB_HOST_ID rtwn_devs[] = {
|
||||
RTWN_RTL8188EU_DEV(MERCUSYS, MW150US),
|
||||
#undef RTWN_RTL8188EU_DEV
|
||||
|
||||
/* RTL8723BU */
|
||||
#define RTWN_RTL8723BU_DEV(v, p, i) \
|
||||
{ USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p), \
|
||||
USB_IF_CSI(UICLASS_VENDOR, UISUBCLASS_VENDOR, \
|
||||
RTWN_USB_DEVINFO(RTWN_CHIP_RTL8723BU, i)) }
|
||||
RTWN_RTL8723BU_DEV(REALTEK, RTL8723BU, 2),
|
||||
#undef RTWN_RTL8723BU_DEV
|
||||
|
||||
/* RTL8812AU */
|
||||
#define RTWN_RTL8812AU_DEV(v,p) \
|
||||
{ USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \
|
||||
@@ -185,6 +195,7 @@ static const chip_usb_attach rtwn_chip_usb_attach[RTWN_CHIP_MAX_USB] = {
|
||||
[RTWN_CHIP_RTL8192CU] = r92cu_attach,
|
||||
[RTWN_CHIP_RTL8192EU] = r92eu_attach,
|
||||
[RTWN_CHIP_RTL8188EU] = r88eu_attach,
|
||||
[RTWN_CHIP_RTL8723BU] = r23bu_attach,
|
||||
[RTWN_CHIP_RTL8812AU] = r12au_attach,
|
||||
[RTWN_CHIP_RTL8821AU] = r21au_attach
|
||||
};
|
||||
|
||||
@@ -27,6 +27,11 @@ SRCS += r92e_chan.c r92e_fw.c r92e_init.c r92e_led.c r92e_rf.c \
|
||||
r92e_rom.c r92e_rx.c r92e.h r92e_priv.h r92e_reg.h \
|
||||
r92e_rom_image.h r92e_rom_defs.h
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/rtwn/rtl8723b
|
||||
SRCS += r23b_calib.c r23b_fw.c r23b_init.c r23b_led.c r23b_rf.c \
|
||||
r23b_rom.c r23b_rx.c r23b.h r23b_priv.h r23b_reg.h \
|
||||
r23b_var.h r23b_rom_defs.h r23b_rom_image.h r23b_fw_cmd.h
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/rtwn/rtl8812a
|
||||
SRCS += r12a_beacon.c r12a_calib.c r12a_caps.c r12a_chan.c r12a_fw.c \
|
||||
r12a_init.c r12a_led.c r12a_rf.c r12a_rom.c r12a_rx.c r12a_tx.c \
|
||||
|
||||
@@ -19,6 +19,9 @@ SRCS += r92cu_attach.c r92cu_init.c r92cu_led.c r92cu_rx.c r92cu_tx.c \
|
||||
.PATH: ${SRCTOP}/sys/dev/rtwn/rtl8192e/usb
|
||||
SRCS += r92eu_attach.c r92eu_init.c r92eu.h r92eu_reg.h
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/rtwn/rtl8723b/usb
|
||||
SRCS += r23bu_attach.c r23bu_init.c r23bu_rom.c r23bu.h
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/rtwn/rtl8812a/usb
|
||||
SRCS += r12au_attach.c r12au_init.c r12au_rx.c r12au_tx.c \
|
||||
r12au.h r12au_reg.h r12au_tx_desc.h
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
SUBDIR= rtwnrtl8188eu rtwnrtl8192cT rtwnrtl8192cU rtwnrtl8192eu rtwnrtl8812au \
|
||||
rtwnrtl8821au rtwnrtl8192cE rtwnrtl8192cEB rtwnrtl8188ee
|
||||
rtwnrtl8821au rtwnrtl8192cE rtwnrtl8192cEB rtwnrtl8188ee rtwnrtl8723bu
|
||||
|
||||
.include <bsd.subdir.mk>
|
||||
@@ -0,0 +1,4 @@
|
||||
KMOD= rtwn-rtl8723bufw
|
||||
IMG= rtwn-rtl8723bufw
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Reference in new issue
Block a user