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jh7110_gpio: fdt_pinctrl interface
This provides GPIO programming/configuration at attach time based on the device tree 'pinmux' descriptions. Reference: device-tree/Bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml Reviewed by: Brian Scott <[email protected]> Tested by: Brian Scott <[email protected]> MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D59992
This commit is contained in:
Mitchell Horne committed
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1 file changed
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-3
@@ -2,6 +2,10 @@
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2023 Jari Sihvola <jsihv@gmx.com>
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* Copyright (c) 2025-2026 The FreeBSD Foundation
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*
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* Portions of this software were developed by Mitchell Horne
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* <mhorne@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
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*/
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#include <sys/param.h>
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@@ -19,12 +23,16 @@
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#include <machine/resource.h>
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#include <dev/clk/clk.h>
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#include <dev/fdt/fdt_pinctrl.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "fdt_pinctrl_if.h"
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#include "gpio_if.h"
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#include <contrib/device-tree/src/riscv/starfive/jh7110-pinfunc.h>
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#define PINCTRL_SYS 1
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#define PINCTRL_AON 2
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@@ -41,15 +49,23 @@
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#define GPIOE_0 0x100
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#define GPIOE_1 0x104
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#define GPIOE_AON 0x20
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#define GP0_GPI_CFG 0x80
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#define AON_GPI_CFG 0x8
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#define GPIO_DIN_LOW 0x118
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#define GPIO_DIN_HIGH 0x11c
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#define GPIO_DIN_AON 0x2c
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#define IOMUX_SYSCFG_288 0x120
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#define IOMUX_AONCFG_52 0x34
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#define PAD_INPUT_EN (1 << 0)
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#define SHIFT_DRIVESTRENGTH 1
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#define PAD_DRIVESTRENGTH (0x3 << SHIFT_DRIVESTRENGTH)
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#define PAD_DRIVESTRENGTH_MASK (0x3 << 1)
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#define PAD_DRIVESTRENGTH_2 (0x0 << 1)
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#define PAD_DRIVESTRENGTH_4 (0x1 << 1)
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#define PAD_DRIVESTRENGTH_8 (0x2 << 1)
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#define PAD_DRIVESTRENGTH_12 (0x3 << 1)
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#define PAD_PULLUP (1 << 3)
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#define PAD_PULLDOWN (1 << 4)
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#define PAD_SLEW (1 << 5)
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@@ -69,10 +85,12 @@ struct jh7110_gpio_softc {
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clk_t clk;
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int pinctrl; /* which pinctrl controller */
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uint32_t maxpin; /* pins on this controller */
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uint32_t maxinput; /* input sources */ /* input sources */
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/* location of variable position fields for the two controllers */
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uint32_t iomuxcfg;
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uint32_t doutcfg;
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uint32_t doencfg;
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uint32_t gpicfg;
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};
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static struct ofw_compat_data compat_data[] = {
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@@ -282,7 +300,7 @@ jh7110_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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if ((flags & GPIO_PIN_INPUT) != 0) {
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reg = RD4(sc, sc->iomuxcfg + PAD_OFFSET(pin));
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reg |= (PAD_INPUT_EN | PAD_HYST);
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reg &= ~(PAD_DRIVESTRENGTH | PAD_SLEW);
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reg &= ~(PAD_DRIVESTRENGTH_MASK | PAD_SLEW);
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if ((flags & GPIO_PIN_PULLUP) != 0)
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reg |= PAD_PULLUP;
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else
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@@ -402,6 +420,8 @@ jh7110_gpio_attach(device_t dev)
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sc->iomuxcfg = IOMUX_SYSCFG_288;
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sc->doutcfg = GP0_DOUT_CFG;
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sc->doencfg = GP0_DOEN_CFG;
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sc->gpicfg = GP0_GPI_CFG;
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sc->maxinput = GPI_SYS_SPI6_RXD;
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} else {
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WR4(sc, GPIOE_AON, 0);
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WR4(sc, AON_GPIOEN, 1);
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@@ -409,8 +429,16 @@ jh7110_gpio_attach(device_t dev)
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sc->iomuxcfg = IOMUX_AONCFG_52;
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sc->doutcfg = AON_DOUT_CFG;
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sc->doencfg = AON_DOEN_CFG;
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sc->gpicfg = AON_GPI_CFG;
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sc->maxinput = GPI_AON_PMU_GPIO_WAKEUP_3;
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}
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/*
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* Register as a pinctrl device
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*/
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fdt_pinctrl_register(dev, NULL);
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fdt_pinctrl_configure_tree(dev);
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sc->busdev = gpiobus_add_bus(dev);
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if (sc->busdev == NULL) {
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device_printf(dev, "Cannot attach gpiobus\n");
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@@ -428,6 +456,141 @@ jh7110_gpio_get_node(device_t bus, device_t dev)
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return (ofw_bus_get_node(bus));
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}
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/* fdt_pinctrl configuration */
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static void
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jh7110_gpio_configure_pin(struct jh7110_gpio_softc *sc, uint32_t pinmux,
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uint32_t padcfg)
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{
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uint32_t dout, doen, reg;
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u_int din, pin, func;
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/*
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* Split up the pinmux definition by field. See GPIOMUX and PINMUX
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* macro definitions in the jh7110-pinfunc.h header.
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*/
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pin = (pinmux >> 0) & 0xff;
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func = (pinmux >> 8) & 0x03;
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doen = (pinmux >> 10) & 0x3f;
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dout = (pinmux >> 16) & 0xff;
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din = (pinmux >> 24) & 0xff;
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/* Not supported (yet?) */
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if (pin > sc->maxpin)
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return;
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if (func != 0 && bootverbose) {
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device_printf(sc->dev, "unexpected function field %u for pin "
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"%u; ignoring\n", func, pin);
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}
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/* Set output configuration state for pin. */
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reg = RD4(sc, sc->doutcfg + GPIO_RW_OFFSET(pin));
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reg &= ~(DATA_OUT_MASK << GPIO_SHIFT(pin));
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reg |= dout << GPIO_SHIFT(pin);
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WR4(sc, sc->doutcfg + GPIO_RW_OFFSET(pin), reg);
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/* Set output enable state for pin. */
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reg = RD4(sc, sc->doencfg + GPIO_RW_OFFSET(pin));
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reg &= ~(ENABLE_MASK << GPIO_SHIFT(pin));
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reg |= doen << GPIO_SHIFT(pin);
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WR4(sc, sc->doencfg + GPIO_RW_OFFSET(pin), reg);
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if (din <= sc->maxinput) {
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reg = RD4(sc, sc->gpicfg + GPIO_RW_OFFSET(din));
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reg &= ~(0x7f << GPIO_SHIFT(din));
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reg |= ((pin + 2) << GPIO_SHIFT(din));
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WR4(sc, sc->gpicfg + GPIO_RW_OFFSET(din), reg);
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}
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/* Update PAD configuration for pin. */
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WR4(sc, sc->iomuxcfg + PAD_OFFSET(pin), padcfg);
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}
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static uint32_t
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parse_padconfig(phandle_t node)
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{
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uint32_t padcfg = 0;
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u_int ds, slew;
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/*
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* See Bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml
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*/
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if (OF_hasprop(node, "input-enable"))
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padcfg |= PAD_INPUT_EN;
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if (!OF_hasprop(node, "bias-disable")) {
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if (OF_hasprop(node, "bias-pull-up")) {
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padcfg |= PAD_PULLUP;
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} else if (OF_hasprop(node, "bias-pull-down")) {
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padcfg |= PAD_PULLDOWN;
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}
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}
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if (OF_getencprop(node, "drive-strength", &ds, sizeof(ds)) != -1) {
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switch (ds) {
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case 12:
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padcfg |= PAD_DRIVESTRENGTH_12;
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break;
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case 8:
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padcfg |= PAD_DRIVESTRENGTH_8;
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break;
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case 4:
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padcfg |= PAD_DRIVESTRENGTH_4;
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break;
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case 2:
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default:
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padcfg |= PAD_DRIVESTRENGTH_2;
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break;
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}
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}
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if (OF_getencprop(node, "slew-rate", &slew, sizeof(slew)) != -1 &&
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slew == 1)
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padcfg |= PAD_SLEW;
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if (OF_hasprop(node, "input-schmitt-enable"))
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padcfg |= PAD_HYST;
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return (padcfg);
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}
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static int
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jh7110_gpio_configure_pins(device_t dev, phandle_t cfgxref)
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{
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struct jh7110_gpio_softc *sc;
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phandle_t node, child;
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pcell_t *pinmux;
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uint32_t padcfg;
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int ncells;
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sc = device_get_softc(dev);
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node = OF_node_from_xref(cfgxref);
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/* Process any and all children. */
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for (child = OF_child(node); child != 0; child = OF_peer(child)) {
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/* Get pinmux */
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ncells = OF_getencprop_alloc_multi(child, "pinmux",
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sizeof(pcell_t), (void **)&pinmux);
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if (ncells == -1)
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continue;
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/* Pad configuration for all pins described by this node. */
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padcfg = parse_padconfig(child);
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JH7110_GPIO_LOCK(sc);
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for (int i = 0; i < ncells; i++) {
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jh7110_gpio_configure_pin(sc, pinmux[i], padcfg);
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}
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JH7110_GPIO_UNLOCK(sc);
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OF_prop_free(pinmux);
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}
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return (0);
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}
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static device_method_t jh7110_gpio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, jh7110_gpio_probe),
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@@ -448,6 +611,9 @@ static device_method_t jh7110_gpio_methods[] = {
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, jh7110_gpio_get_node),
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/* fdt_pinctrl interface */
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DEVMETHOD(fdt_pinctrl_configure, jh7110_gpio_configure_pins),
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DEVMETHOD_END
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};
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