Anurag Kumar Vulisha cea0f76a48 dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY ...

Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.

Signed-off-by: Anurag Kumar Vulisha <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>

2020-06-29 18:48:00 +05:30

..

phy-am654-serdes.h

…

phy-lantiq-vrx200-pcie.h

dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

2019-08-23 09:40:46 +05:30

phy-ocelot-serdes.h

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phy-pistachio-usb.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422

2019-06-05 17:37:15 +02:00

phy-qcom-qusb2.h

…

phy.h

dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY

2020-06-29 18:48:00 +05:30