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Reduce the code executed in the DQRR dequeue loop, and move the heavy-weight operations to post-dequeue loop. * Batch if_input() after DQRR dispatch loop completes. Only do the DQRR_CI_CINH write at the end of the loop, so only up to 16 entries will be processed. * Add software LRO per FQ. Each per-CPU RX FQ gets its own LRO tracking structure. Since LRO is configured at FQ initialization time, allocate the ifnet earlier in attach to prevent a panic.
215 lines
4.7 KiB
C
215 lines
4.7 KiB
C
/*
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* Copyright (c) 2026 Justin Hibbits
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#ifndef QMAN_VAR_H
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#define QMAN_VAR_H
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#include <sys/queue.h>
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#include "dpaa_common.h"
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#include "portals.h"
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struct qman_eqcr_entry {
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uint8_t verb;
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uint8_t dca;
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uint16_t seqnum;
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uint32_t orp;
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uint32_t fqid;
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uint32_t tag;
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struct dpaa_fd fd;
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uint8_t _rsvd[32];
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};
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_Static_assert(sizeof(struct qman_eqcr_entry) == 64, "EQCR entry mis-sized");
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DPAA_RING_DECLARE(qman_eqcr);
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DPAA_RING_DECLARE(qman_dqrr);
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DPAA_RING_DECLARE(qman_mr);
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union qman_mc_command {
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struct {
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uint8_t verb;
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uint8_t data[63];
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} common;
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struct {
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uint8_t verb;
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uint8_t _rsvd0;
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uint16_t we_mask;
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uint32_t fqid; /* Only bottom 24 bits allowed */
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uint16_t count;
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uint8_t orpc;
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uint8_t cgid;
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uint16_t fq_ctrl;
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uint16_t dest_chan:13;
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uint16_t dest_wq:3;
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uint16_t ics_cred;
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uint16_t td_thresh_oac;
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uint32_t context_b;
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uint64_t context_a;
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uint8_t _rsvd1[32];
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} init_fq;
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struct {
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uint8_t verb;
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uint8_t _rsvd0[3];
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uint32_t fqid; /* Only bottom 24 bits used */
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uint8_t _rsvd1[56];
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} query_fq;
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struct {
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uint8_t verb;
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uint8_t _rsvd0[3];
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uint32_t fqid;
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uint8_t _rsvd1[56];
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} query_fq_np;
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struct {
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uint8_t verb;
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uint8_t _rsvd0[3];
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uint32_t fqid;
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uint8_t _rsvd1;
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uint8_t count;
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uint8_t _rsvd2[10];
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uint32_t context_b;
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uint8_t _rsvd3[40];
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} alter_fqs;
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};
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union qman_mc_result {
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struct {
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uint8_t verb;
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uint8_t data[63];
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} common;
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struct {
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uint8_t verb;
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uint8_t rslt;
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uint8_t _rsvd[62];
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} init_fq;
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struct {
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uint8_t verb;
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uint8_t rslt;
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uint8_t _rsvd0[8];
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uint8_t orpc;
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uint8_t cgid;
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uint16_t fq_ctrl;
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uint16_t dest_wq;
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uint16_t ics_cred;
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uint16_t td_thresh;
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uint32_t context_b;
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uint64_t context_a; /* 8 bytes on the wire */
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uint16_t oac;
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uint8_t _rsvd1[30];
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} query_fq;
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struct {
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uint8_t verb;
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uint8_t rslt;
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uint8_t _rsvd0;
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uint8_t state;
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uint32_t fqd_link;
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uint16_t odp_seq;
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uint16_t orp_nesn;
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uint16_t orp_ea_hseq;
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uint16_t orp_ea_tseq;
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uint32_t orp_ea_hptr;
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uint32_t orp_ea_tptr;
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uint32_t pfdr_hptr;
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uint32_t pfdr_tptr;
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uint8_t _rsvd1[5];
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uint8_t is;
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uint16_t ics_surp;
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uint32_t byte_cnt;
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uint32_t frm_cnt;
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uint32_t _rsvd2;
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uint16_t ra1_sfdr;
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uint16_t ra2_sfdr;
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uint16_t _rsvd3;
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uint16_t od1_sfdr;
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uint16_t od2_sfdr;
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uint16_t od3_sfdr;
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} query_fq_np;
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struct {
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uint8_t verb;
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uint8_t rslt;
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uint8_t fqs;
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uint8_t _rsvd[61];
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} alter_fqs;
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};
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_Static_assert(sizeof(union qman_mc_command) == 64, "MC command mis-sized");
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_Static_assert(sizeof(union qman_mc_result) == 64, "MC result mis-sized");
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#define QCSP_VERB_INIT_FQ_PARK 0x40
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#define QCSP_VERB_INIT_FQ_SCHED 0x41
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#define QCSP_VERB_QUERY_FQ 0x44
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#define QCSP_VERB_QUERY_FQ_NP 0x45
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#define QCSP_VERB_ALTER_FQ_SCHED 0x48
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#define QCSP_VERB_ALTER_FQ_FE 0x49
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#define QCSP_VERB_ALTER_FQ_RETIRE 0x4a
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#define QCSP_VERB_ALTER_FQ_TAKE_OUT 0x4b
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#define QCSP_VERB_ALTER_FQ_RETIRE_CTXB 0x4c
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#define QCSP_VERB_ALTER_FQ_XON 0x4d
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#define QCSP_VERB_ALTER_FQ_XOFF 0x4e
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/* Init FQ */
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#define QCSP_INIT_FQ_WE_OAC 0x0100
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#define QCSP_INIT_FQ_WE_ORPC 0x0080
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#define QCSP_INIT_FQ_WE_CGID 0x0040
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#define QCSP_INIT_FQ_WE_FQ_CTRL 0x0020
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#define QCSP_INIT_FQ_WE_DEST_WQ 0x0010
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#define QCSP_INIT_FQ_WE_ICS_CRED 0x0008
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#define QCSP_INIT_FQ_WE_TD_THRESH 0x0004
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#define QCSP_INIT_FQ_WE_CONTEXT_B 0x0002
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#define QCSP_INIT_FQ_WE_CONTEXT_A 0x0001
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#define QMAN_MC_RES_OK 0xf0
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#define QMAN_MC_AFQS_NE 0x01
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/* Init FQ options */
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#define QM_FQCTRL_CGE 0x0400
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#define QM_FQCTRL_TDE 0x0200
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#define QM_FQCTRL_ORP 0x0100
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#define QM_FQCTRL_CTXASTASH 0x0080
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#define QM_FQCTRL_CPCSTASH 0x0040
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#define QM_FQCTRL_FORCESFDR 0x0008
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#define QM_FQCTRL_AVOIDBLOCK 0x0004
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#define QM_FQCTRL_HOLDACTIVE 0x0002
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#define QM_FQCTRL_LIC 0x0001
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struct qman_mc {
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uint8_t polarity;
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bool busy;
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};
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struct qman_fq {
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uint32_t fqid; /* base FQID of the range */
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uint32_t fqid_count; /* length of the range (>=1) */
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bool force_fqid; /* caller owns the FQID allocation */
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bool dirty; /* on a portal's dirty list this poll */
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SLIST_ENTRY(qman_fq) dirty_next;/* DQRR loop dirty list. */
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struct qman_cb cb;
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};
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struct qman_portal_softc {
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struct dpaa_portal_softc sc_base;
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/* Rings (Enqueue, Dequeue, Message */
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struct qman_eqcr_ring sc_eqcr;
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struct qman_dqrr_ring sc_dqrr;
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struct qman_mr_ring sc_mr;
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struct qman_mc sc_mc;
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int sc_affine_channel;
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};
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struct qman_fq *qman_fq_from_index(uint32_t fqid);
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union qman_mc_result *
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qman_portal_mc_send_raw(device_t, union qman_mc_command *);
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int qman_portal_fq_enqueue(device_t, struct qman_fq *, struct dpaa_fd *);
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void qman_portal_static_dequeue_channel(device_t, int);
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void qman_portal_static_dequeue_rm_channel(device_t dev, int channel);
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extern int qman_channel_base;
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DPCPU_DECLARE(device_t, qman_affine_portal);
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#endif /* QMAN_VAR_H */
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