Marc Zyngier 12b2905af1 irqchip/gic-v3-its: Honor hypervisor enforced LPI range ...

A recent extension to the GIC architecture allows a hypervisor to
arbitrarily reduce the number of LPIs available to a guest, no
matter what the GIC says about the valid range of IntIDs.

Let's factor in this information when computing the number of
available LPIs

Signed-off-by: Marc Zyngier <[email protected]>

2018-07-16 14:22:19 +01:00

..

arm-gic-common.h

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arm-gic-v3.h

irqchip/gic-v3-its: Honor hypervisor enforced LPI range

2018-07-16 14:22:19 +01:00

arm-gic-v4.h

irqchip/gic-v4: Add forward definition of struct irq_domain_ops

2017-11-13 16:21:33 +00:00

arm-gic.h

KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

2018-03-14 18:31:04 +00:00

arm-vic.h

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chained_irq.h

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ingenic.h

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irq-bcm2836.h

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irq-omap-intc.h

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irq-partition-percpu.h

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irq-sa11x0.h

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mmp.h

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

mxs.h

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versatile-fpga.h

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

xtensa-mx.h

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xtensa-pic.h

…