Marek Olšák 439a1cfffe drm/radeon: expose render backend mask to the userspace ...

This will allow userspace to correctly program the PA_SC_RASTER_CONFIG
register, so it can be considered a fix.

Signed-off-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]

2013-12-23 10:03:43 -05:00

..

armada_drm.h

DRM: Armada: Add Armada DRM driver

2013-10-12 10:13:40 +01:00

drm_fourcc.h

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drm_mode.h

Merge tag 'v3.12' into drm-intel-next

2013-11-04 16:28:52 +01:00

drm_sarea.h

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drm.h

drm: Add a STEREO_3D capability to the SET_CLIENT_CAP ioctl

2013-10-01 07:45:27 +02:00

exynos_drm.h

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i810_drm.h

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i915_drm.h

drm/i915: Add second slice l3 remapping

2013-09-19 20:37:04 +02:00

Kbuild

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mga_drm.h

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msm_drm.h

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nouveau_drm.h

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omap_drm.h

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qxl_drm.h

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r128_drm.h

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radeon_drm.h

drm/radeon: expose render backend mask to the userspace

2013-12-23 10:03:43 -05:00

savage_drm.h

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sis_drm.h

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tegra_drm.h

drm/tegra: Deliver syncpoint base to user space

2013-10-31 09:55:48 +01:00

via_drm.h

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vmwgfx_drm.h

drm/vmwgfx: Add max surface memory param

2013-12-08 23:50:23 -08:00