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Create a new driver for the da8xx DDR2/mDDR controller and implement support for writing to the Peripheral Bus Burst Priority Register. Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> [[email protected]: subject line adjustment] Signed-off-by: Sekhar Nori <[email protected]>
24 lines
700 B
Makefile
24 lines
700 B
Makefile
#
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# Makefile for memory devices
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#
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ifeq ($(CONFIG_DDR),y)
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obj-$(CONFIG_OF) += of_memory.o
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endif
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obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o
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obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
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obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o
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obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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obj-$(CONFIG_TI_EMIF) += emif.o
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obj-$(CONFIG_OMAP_GPMC) += omap-gpmc.o
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obj-$(CONFIG_FSL_CORENET_CF) += fsl-corenet-cf.o
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obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
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obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
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obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
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obj-$(CONFIG_JZ4780_NEMC) += jz4780-nemc.o
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obj-$(CONFIG_MTK_SMI) += mtk-smi.o
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obj-$(CONFIG_DA8XX_DDRCTL) += da8xx-ddrctl.o
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obj-$(CONFIG_SAMSUNG_MC) += samsung/
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obj-$(CONFIG_TEGRA_MC) += tegra/
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