Igor Kravchenko 098214999c drm/amd/display: Read VBIOS Golden Settings Tbl ...

[Why]
For ver.4.4 and higher VBIOS contains default setting table.

{How]
Read Golden Settings Table from VBIOS, apply Aux tuning parameters.

Signed-off-by: Igor Kravchenko <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

2020-08-06 16:47:13 -04:00

..

asic_reg

drm amdgpu: SI UVD registers

2020-07-01 01:59:24 -04:00

ivsrcid

drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)

2020-06-03 13:52:03 -04:00

amd_acpi.h

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amd_pcie_helpers.h

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amd_pcie.h

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amd_shared.h

drm/amdgpu: add apu flags (v2)

2020-05-22 13:41:53 -04:00

arct_ip_offset.h

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atom-bits.h

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atom-names.h

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atom-types.h

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atombios.h

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atomfirmware.h

drm/amd/display: Read VBIOS Golden Settings Tbl

2020-08-06 16:47:13 -04:00

atomfirmwareid.h

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cgs_common.h

drm/amdgpu: retire indirect mmio reg support from cgs

2020-04-09 10:43:18 -04:00

cik_structs.h

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discovery.h

drm/amdgpu/discovery: reserve discovery data at the top of VRAM

2019-10-15 15:48:46 -04:00

displayobject.h

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dm_pp_interface.h

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kgd_kfd_interface.h

drm/amdkfd: Consolidate duplicated bo alloc flags

2020-03-10 15:54:34 -04:00

kgd_pp_interface.h

drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2

2019-11-06 16:27:46 -05:00

navi10_enum.h

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navi10_ip_offset.h

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navi12_ip_offset.h

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navi14_ip_offset.h

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pptable.h

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renoir_ip_offset.h

drm/amd/display: Add DCN_BASE regs

2019-10-17 16:27:27 -04:00

sienna_cichlid_ip_offset.h

drm/amdgpu: initialize IP offset for sienna_cichlid (v2)

2020-06-03 13:52:00 -04:00

soc15_hw_ip.h

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soc15_ih_clientid.h

drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid

2020-06-03 13:52:04 -04:00

v9_structs.h

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v10_structs.h

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vega10_enum.h

drm/amdgpu: Support new arcturus mtype

2019-09-13 17:35:48 -05:00

vega10_ip_offset.h

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vega20_ip_offset.h

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vi_structs.h

…