Brian Norris 3dad2344e9 mtd: nand: force NAND_CMD_READID onto 8-bit bus ...

The NAND command helpers tend to automatically shift the column address
for x16 bus devices, since most commands expect a word address, not a
byte address. The Read ID command, however, expects an 8-bit address
(i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
0x20).

This fixes the column address for a few drivers which imitate the
nand_base defaults. Note that I don't touch sh_flctl.c, since it already
handles this problem slightly differently (note its comment "READID is
always performed using an 8-bit bus").

I have not tested this patch, as I only have x8 parts up for testing at
this point. Hopefully that can change soon...

Signed-off-by: Brian Norris <[email protected]>
Tested-by: Ezequiel Garcia <[email protected]>
Tested-By: Pekon Gupta <[email protected]>

2014-03-10 22:42:22 -07:00

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bbm.h

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blktrans.h

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cfi_endian.h

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cfi.h

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concat.h

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doc2000.h

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flashchip.h

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fsmc.h

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ftl.h

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gen_probe.h

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inftl.h

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latch-addr-flash.h

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lpc32xx_mlc.h

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lpc32xx_slc.h

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map.h

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mtd.h

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mtdram.h

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nand_bch.h

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nand_ecc.h

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nand-gpio.h

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nand.h

mtd: nand: force NAND_CMD_READID onto 8-bit bus

2014-03-10 22:42:22 -07:00

ndfc.h

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nftl.h

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onenand_regs.h

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onenand.h

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partitions.h

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pfow.h

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physmap.h

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pismo.h

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plat-ram.h

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qinfo.h

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sh_flctl.h

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sharpsl.h

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spear_smi.h

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super.h

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ubi.h

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xip.h

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