Marco Felsch 22168675ba phy: dphy: add support to calculate the timing based on hs_clk_rate ...

For MIPI-CSI sender use-case it is common to specify the allowed
link-frequencies which should be used for the MIPI link and is
half the hs-clock rate.

This commit adds a helper to calculate the D-PHY timing based on the
hs-clock rate so we don't need to calculate the timings within the
driver.

Signed-off-by: Marco Felsch <[email protected]>
Acked-by: Vinod Koul <[email protected]>
Signed-off-by: Sakari Ailus <[email protected]>

2022-10-27 14:38:04 +03:00

..

tegra

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omap_control_phy.h

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omap_usb.h

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pcie.h

phy: rockchip: Support PCIe v3

2022-09-04 20:35:48 +05:30

phy-dp.h

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phy-lvds.h

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phy-mipi-dphy.h

phy: dphy: add support to calculate the timing based on hs_clk_rate

2022-10-27 14:38:04 +03:00

phy-sun4i-usb.h

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phy.h

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ulpi_phy.h

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