Files
erofs-linux/drivers/dma
Simon Guinot cc60f8878e dmaengine: fix interrupt clearing for mv_xor
When using simultaneously the two DMA channels on a same engine, some
transfers are never completed. For example, an endless lock can occur
while writing heavily on a RAID5 array (with async-tx offload support
enabled).

Note that this issue can also be reproduced by using the DMA test
client.

On a same engine, the interrupt cause register is shared between two
DMA channels. This patch make sure that the cause bit is only cleared
for the requested channel.

Signed-off-by: Simon Guinot <[email protected]>
Tested-by: Luc Saillard <[email protected]>
Acked-by: saeed bishara <[email protected]>
Cc: <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
2010-09-23 14:14:22 -07:00
..
2010-05-17 16:30:58 -07:00
2010-08-04 14:27:47 -07:00
2010-02-02 14:51:42 -07:00
2010-05-17 16:30:58 -07:00
…
2010-05-23 20:28:19 -07:00