Yannick Fertre b7243862f8 drm/stm: ltdc: handle lvds pixel clock ...

Handle LVDS pixel clock.

The LTDC operates with multiple clock domains for register access,
requiring all clocks to be provided during read/write operations.  This
imposes a dependency between the LVDS and LTDC to access correctly all
LTDC registers.  And because both IPs' pixel rates must be synchronized,
the LTDC has to handle the LVDS clock.

Signed-off-by: Yannick Fertre <[email protected]>
Acked-by: Yannick Fertre <[email protected]>
Acked-by: Philippe Cornu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Raphael Gallais-Pou <[email protected]>

2025-08-28 17:43:57 +02:00

..

drv.c

drm/stm: ltdc: support new hardware version for STM32MP25 SoC

2025-08-28 17:43:56 +02:00

dw_mipi_dsi-stm.c

…

Kconfig

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ltdc.c

drm/stm: ltdc: handle lvds pixel clock

2025-08-28 17:43:57 +02:00

ltdc.h

drm/stm: ltdc: handle lvds pixel clock

2025-08-28 17:43:57 +02:00

lvds.c

drm/bridge: stm_lvds: convert to devm_drm_bridge_alloc() API

2025-05-21 13:40:09 +02:00

Makefile

…