Aneesh Kumar K.V 85c1fafd72 powerpc/mm: Use read barrier when creating real_pte ...

On ppc64 we support 4K hash pte with 64K page size. That requires
us to track the hash pte slot information on a per 4k basis. We do that
by storing the slot details in the second half of pte page. The pte bit
_PAGE_COMBO is used to indicate whether the second half need to be
looked while building real_pte. We need to use read memory barrier while
doing that so that load of hidx is not reordered w.r.t _PAGE_COMBO
check. On the store side we already do a lwsync in __hash_page_4K

CC: <[email protected]>
Signed-off-by: Aneesh Kumar K.V <[email protected]>
Signed-off-by: Benjamin Herrenschmidt <[email protected]>

2014-08-13 18:20:41 +10:00

..

asm

powerpc/mm: Use read barrier when creating real_pte

2014-08-13 18:20:41 +10:00

uapi/asm

KVM: PPC: Book3S: Fix LPCR one_reg interface

2014-07-28 15:23:16 +02:00