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After hotplugging CPU1 the first call of interrupt handler for CPU1 oneshot timer was called on CPU0 because it fired before setting IRQ affinity. Affected are SoCs where Multi Core Timer interrupts are shared (SPI), e.g. Exynos 4210. During setup of the MCT timers the clock event device should be registered after setting the affinity for interrupt. This will prevent starting the timer too early. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: Kyungmin Park <[email protected]> Cc: Marek Szyprowski <[email protected]> Cc: Bartlomiej Zolnierkiewicz <[email protected]> Cc: Tomasz Figa <[email protected]>, Cc: Daniel Lezcano <[email protected]>, Cc: Kukjin Kim <[email protected]> Cc: [email protected], Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>