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Michael Strauss
61e50646f0
[WHY] Only a single voltage level should be available to Pollock (min level) Pollock & Dali get misidentified as Renoir, use wrong clk mgr constructor [HOW] Add provided Pollock IDs to ASIC Rev. ID list. Create new Pollock ASIC RID check, fix RV2 & Dali ASIC checks. Check RID and set max voltage level to 0 if Pollock is detected. Work around broken ASICREV_IS_RENOIR, IS_RAVEN2, etc. checks by performing Dali/Pollock checks before they can be misidentified as RN. Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>