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git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
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Steffen Persvold
008cb88edb
On 32-bit systems the config space is too large to ioremap in one go, so
pci_ecam_create() maps each bus segment separately and relies on the
->add_bus callback (pci_ecam_add_bus) to populate the per-bus mapping in
cfg->winp[]. pci_ecam_map_bus() then uses that mapping as the base for
every config access.
The generic ECAM ops (pci_generic_ecam_ops) already provide the ->add_bus
and ->remove_bus callbacks, but the CAM (legacy) ops in pci-host-generic.c
do not. As a result, on a 32-bit host using "pci-host-cam-generic" the
per-bus mapping is never set up and the first config read dereferences a
NULL base, crashing during bus enumeration:
Unable to handle kernel NULL pointer dereference at virtual address 00000800
Oops [#1]
CPU: 0 PID: 1 Comm: swapper Not tainted 6.9.7+ #43
Hardware name: Digilent Nexys-Video-A7 RV32 (DT)
epc : pci_generic_config_read+0x40/0xb0
ra : pci_generic_config_read+0x2c/0xb0
[<c038db9c>] pci_generic_config_read+0x40/0xb0
[<c038da04>] pci_bus_read_config_dword+0x50/0xb0
[<c0391e94>] pci_bus_generic_read_dev_vendor_id+0x3c/0x1ec
[<c039245c>] pci_scan_single_device+0xa4/0x11c
[<c0392570>] pci_scan_slot+0x9c/0x23c
[<c039388c>] pci_scan_child_bus_extend+0x58/0x2f4
[<c0393db0>] pci_scan_root_bus_bridge+0x64/0xe8
[<c0393e54>] pci_host_probe+0x20/0xc8
[<c03bc6f4>] pci_host_common_probe+0x144/0x1e4
Fix this by giving the CAM ops the same ->add_bus/->remove_bus callbacks.
Since pci_ecam_add_bus() and pci_ecam_remove_bus() are static to ecam.c,
move the CAM ops definition there as pci_generic_cam_ops (mirroring
pci_generic_ecam_ops) and export it for pci-host-generic.c to reference.
Fixes: 8fe55ef233 ("PCI: Dynamically map ECAM regions")
Signed-off-by: Steffen Persvold <[email protected]>
[mani: removed timestamp from log]
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Cc: [email protected]
Link: https://patch.msgid.link/[email protected]
100 lines
3.3 KiB
C
100 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2016 Broadcom
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*/
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#ifndef DRIVERS_PCI_ECAM_H
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#define DRIVERS_PCI_ECAM_H
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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/*
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* Memory address shift values for the byte-level address that
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* can be used when accessing the PCI Express Configuration Space.
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*/
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/*
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* Enhanced Configuration Access Mechanism (ECAM)
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*
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* See PCI Express Base Specification, Revision 5.0, Version 1.0,
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* Section 7.2.2, Table 7-1, p. 677.
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*/
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#define PCIE_ECAM_BUS_SHIFT 20 /* Bus number */
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#define PCIE_ECAM_DEVFN_SHIFT 12 /* Device and Function number */
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#define PCIE_ECAM_BUS_MASK 0xff
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#define PCIE_ECAM_DEVFN_MASK 0xff
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#define PCIE_ECAM_REG_MASK 0xfff /* Limit offset to a maximum of 4K */
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#define PCIE_ECAM_BUS(x) (((x) & PCIE_ECAM_BUS_MASK) << PCIE_ECAM_BUS_SHIFT)
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#define PCIE_ECAM_DEVFN(x) (((x) & PCIE_ECAM_DEVFN_MASK) << PCIE_ECAM_DEVFN_SHIFT)
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#define PCIE_ECAM_REG(x) ((x) & PCIE_ECAM_REG_MASK)
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#define PCIE_ECAM_OFFSET(bus, devfn, where) \
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(PCIE_ECAM_BUS(bus) | \
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PCIE_ECAM_DEVFN(devfn) | \
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PCIE_ECAM_REG(where))
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/*
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* struct to hold pci ops and bus shift of the config window
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* for a PCI controller.
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*/
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struct pci_config_window;
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struct pci_ecam_ops {
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unsigned int bus_shift;
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struct pci_ops pci_ops;
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int (*init)(struct pci_config_window *);
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int (*enable_device)(struct pci_host_bridge *,
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struct pci_dev *);
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void (*disable_device)(struct pci_host_bridge *,
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struct pci_dev *);
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};
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/*
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* struct to hold the mappings of a config space window. This
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* is expected to be used as sysdata for PCI controllers that
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* use ECAM.
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*/
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struct pci_config_window {
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struct resource res;
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struct resource busr;
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unsigned int bus_shift;
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void *priv;
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const struct pci_ecam_ops *ops;
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union {
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void __iomem *win; /* 64-bit single mapping */
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void __iomem **winp; /* 32-bit per-bus mapping */
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};
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struct device *parent;/* ECAM res was from this dev */
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};
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/* create and free pci_config_window */
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struct pci_config_window *pci_ecam_create(struct device *dev,
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struct resource *cfgres, struct resource *busr,
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const struct pci_ecam_ops *ops);
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void pci_ecam_free(struct pci_config_window *cfg);
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/* map_bus when ->sysdata is an instance of pci_config_window */
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void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
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int where);
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/* default ECAM ops */
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extern const struct pci_ecam_ops pci_generic_ecam_ops;
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/* default CAM ops */
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extern const struct pci_ecam_ops pci_generic_cam_ops;
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#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
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extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
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extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
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extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
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extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
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extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */
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extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */
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extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */
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extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */
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extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */
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extern const struct pci_ecam_ops loongson_pci_ecam_ops; /* Loongson PCIe */
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#endif
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#endif
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