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git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
synced 2026-10-31 14:23:49 +01:00
Hans de Goede
8d9ef69487
The drivers for various CHT Whiskey Cove PMIC child-devices need to know the model, since they have model specific behavior. The DMI match table for this is shared between the child-device-drivers inside the MFD driver. Add the Lenovo Yoga Tab 3 X90F, which is a previously unknown tablet model with a CHT Whiskey Cove PMIC, to the intel_cht_wc_models enum and to the DMI match table. Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Lee Jones <[email protected]> Link: https://lore.kernel.org/r/[email protected]
57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Intel SoC PMIC Driver
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*
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* Copyright (C) 2012-2014 Intel Corporation. All rights reserved.
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*
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* Author: Yang, Bin <[email protected]>
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* Author: Zhu, Lejun <[email protected]>
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*/
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#ifndef __INTEL_SOC_PMIC_H__
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#define __INTEL_SOC_PMIC_H__
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#include <linux/regmap.h>
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enum intel_cht_wc_models {
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INTEL_CHT_WC_UNKNOWN,
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INTEL_CHT_WC_GPD_WIN_POCKET,
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INTEL_CHT_WC_XIAOMI_MIPAD2,
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INTEL_CHT_WC_LENOVO_YOGABOOK1,
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INTEL_CHT_WC_LENOVO_YT3_X90,
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};
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/**
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* struct intel_soc_pmic - Intel SoC PMIC data
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* @irq: Master interrupt number of the parent PMIC device
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* @regmap: Pointer to the parent PMIC device regmap structure
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* @irq_chip_data: IRQ chip data for the PMIC itself
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* @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button
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* @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit
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* @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit
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* @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC
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* @irq_chip_data_chgr: Chained IRQ chip data for the External Charger
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* @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler
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* @dev: Pointer to the parent PMIC device
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* @scu: Pointer to the SCU IPC device data structure
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*/
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struct intel_soc_pmic {
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int irq;
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struct regmap *regmap;
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struct regmap_irq_chip_data *irq_chip_data;
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struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
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struct regmap_irq_chip_data *irq_chip_data_tmu;
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struct regmap_irq_chip_data *irq_chip_data_bcu;
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struct regmap_irq_chip_data *irq_chip_data_adc;
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struct regmap_irq_chip_data *irq_chip_data_chgr;
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struct regmap_irq_chip_data *irq_chip_data_crit;
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struct device *dev;
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struct intel_scu_ipc_dev *scu;
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enum intel_cht_wc_models cht_wc_model;
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};
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int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,
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u32 value, u32 mask);
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#endif /* __INTEL_SOC_PMIC_H__ */
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