Harry VanZyllDeJong 3df68ac6a7 drm/amd/display: Update VRR info packet to support 12-bit refresh rates ...

[Why]
VRR info packet previously only supported up to 10-bit refresh rate values
limiting the range of FreeSync minimum and maximum refresh rates that
could be encoded.

[How]
Expanded the bit masking in PB11/PB12 from 2 to 4 bits to capture bits
11:8 of the minimum and maximum FreeSync refresh rates, enabling the VRR
info packet to encode 12-bit refresh rate values.

Reviewed-by: Anthony Koo <[email protected]>
Signed-off-by: Harry VanZyllDeJong <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Dan Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

2026-08-06 09:58:25 -04:00

..

freesync.c

drm/amd/display: Update VRR info packet to support 12-bit refresh rates

2026-08-06 09:58:25 -04:00

Makefile

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