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Pedro Kopper
fbfa013eea
mpfs_cfg_clk_set_rate() passes the mask and value arguments to
regmap_update_bits() in the wrong order. The resulting write becomes
reg = orig_reg | val, causing bits to not be cleared if the clock
divider changes.
Pass the arguments in the correct order so the divider field is updated
as intended.
Fixes: c6f2dddfa7 ("clk: microchip: mpfs: use regmap for clocks")
Signed-off-by: Pedro Kopper <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Cc: [email protected]
Signed-off-by: Stephen Boyd <[email protected]>