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The contended_release tracepoint needs to hook queued_spin_unlock(), but architectures with a custom unlock define queued_spin_unlock() directly, leaving no single generic place to add the tracing. Introduce queued_spin_release() as the arch-overridable release primitive and make queued_spin_unlock() a generic wrapper around it. An architecture that only customizes the release can then override queued_spin_release() and inherit the generic wrapper. Rename the MIPS override to queued_spin_release() accordingly. x86 paravirt overrides queued_spin_unlock() directly and is left unchanged. No functional change intended. Signed-off-by: Dmitry Ilvokhin <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Juergen Gross <[email protected]> Link: https://patch.msgid.link/b8daabae6469ad72cc784a911f6cc43a6d45df3a.1785778551.git.d@ilvokhin.com
32 lines
826 B
C
32 lines
826 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1999, 2000, 06 Ralf Baechle ([email protected])
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_SPINLOCK_H
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#define _ASM_SPINLOCK_H
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#include <asm/processor.h>
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#include <asm-generic/qspinlock_types.h>
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#define queued_spin_release queued_spin_release
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/**
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* queued_spin_release - release a queued spinlock
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* @lock : Pointer to queued spinlock structure
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*/
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static inline void queued_spin_release(struct qspinlock *lock)
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{
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/* This could be optimised with ARCH_HAS_MMIOWB */
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mmiowb();
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smp_store_release(&lock->locked, 0);
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}
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#include <asm/qspinlock.h>
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#include <asm/qrwlock.h>
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#endif /* _ASM_SPINLOCK_H */
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