mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
synced 2026-10-31 14:23:49 +01:00
Matt Turner
49672d026c
ieee_swcr_to_fpcr() converts the software IEEE trap-enable and status bits kept in thread_info.ieee_state into the hardware FPCR format. It contained: fp |= (~sw & IEEE_TRAP_ENABLE_DNO) << 41; FPCR_DNOD (bit 47) disables denormal operand traps: with it set the hardware handles a denormal operand itself, treating it as zero, instead of trapping for software completion. The intent was to set DNOD when the user has not asked for SIGFPE on denormal operands, but IEEE_TRAP_ENABLE_DNO is clear by default, so ieee_swcr_to_fpcr(0) always set DNOD. Instructions built with the software completion suffix therefore never trapped on a denormal operand. The hardware silently substituted zero and produced wrong results, affecting every program compiled with -mieee and default FPU settings, glibc included. Set FPCR_DNOD only when IEEE_MAP_DMZ is requested, which is exactly the case where flushing denormal inputs to zero is what the user asked for. DNOD then encodes MAP_DMZ, which ieee_fpcr_to_swcr() already recovers from FPCR_DNZ, so drop its attempt to recover IEEE_TRAP_ENABLE_DNO from DNOD; the DNO trap enable lives solely in ieee_state. Both functions are in a uapi header, so the encoding change is visible to userspace, but nothing outside the kernel is known to depend on DNOD carrying the DNO trap enable, and the kernel is the only writer of the FPCR. This must not be backported on its own. Re-enabling denormal operand traps exposes a second bug, fixed in the following patch: those traps usually find an exact result, and for an exact result the emulator did not write the FPCR back, leaving hardware-fabricated exception bits visible to user space. Taken alone this change would make spurious exception flags more common. The bug predates the git history, so there is no commit to reference in a Fixes tag. Cc: [email protected] # 5.15+ Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Magnus Lindholm <[email protected]> Tested-by: Magnus Lindholm <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Magnus Lindholm <[email protected]>
129 lines
4.7 KiB
C
129 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _UAPI__ASM_ALPHA_FPU_H
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#define _UAPI__ASM_ALPHA_FPU_H
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/*
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* Alpha floating-point control register defines:
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*/
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#define FPCR_DNOD (1UL<<47) /* denorm INV trap disable */
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#define FPCR_DNZ (1UL<<48) /* denorms to zero */
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#define FPCR_INVD (1UL<<49) /* invalid op disable (opt.) */
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#define FPCR_DZED (1UL<<50) /* division by zero disable (opt.) */
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#define FPCR_OVFD (1UL<<51) /* overflow disable (optional) */
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#define FPCR_INV (1UL<<52) /* invalid operation */
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#define FPCR_DZE (1UL<<53) /* division by zero */
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#define FPCR_OVF (1UL<<54) /* overflow */
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#define FPCR_UNF (1UL<<55) /* underflow */
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#define FPCR_INE (1UL<<56) /* inexact */
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#define FPCR_IOV (1UL<<57) /* integer overflow */
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#define FPCR_UNDZ (1UL<<60) /* underflow to zero (opt.) */
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#define FPCR_UNFD (1UL<<61) /* underflow disable (opt.) */
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#define FPCR_INED (1UL<<62) /* inexact disable (opt.) */
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#define FPCR_SUM (1UL<<63) /* summary bit */
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#define FPCR_DYN_SHIFT 58 /* first dynamic rounding mode bit */
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#define FPCR_DYN_CHOPPED (0x0UL << FPCR_DYN_SHIFT) /* towards 0 */
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#define FPCR_DYN_MINUS (0x1UL << FPCR_DYN_SHIFT) /* towards -INF */
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#define FPCR_DYN_NORMAL (0x2UL << FPCR_DYN_SHIFT) /* towards nearest */
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#define FPCR_DYN_PLUS (0x3UL << FPCR_DYN_SHIFT) /* towards +INF */
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#define FPCR_DYN_MASK (0x3UL << FPCR_DYN_SHIFT)
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#define FPCR_MASK 0xffff800000000000L
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/*
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* IEEE trap enables are implemented in software. These per-thread
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* bits are stored in the "ieee_state" field of "struct thread_info".
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* Thus, the bits are defined so as not to conflict with the
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* floating-point enable bit (which is architected). On top of that,
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* we want to make these bits compatible with OSF/1 so
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* ieee_set_fp_control() etc. can be implemented easily and
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* compatibly. The corresponding definitions are in
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* /usr/include/machine/fpu.h under OSF/1.
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*/
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#define IEEE_TRAP_ENABLE_INV (1UL<<1) /* invalid op */
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#define IEEE_TRAP_ENABLE_DZE (1UL<<2) /* division by zero */
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#define IEEE_TRAP_ENABLE_OVF (1UL<<3) /* overflow */
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#define IEEE_TRAP_ENABLE_UNF (1UL<<4) /* underflow */
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#define IEEE_TRAP_ENABLE_INE (1UL<<5) /* inexact */
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#define IEEE_TRAP_ENABLE_DNO (1UL<<6) /* denorm */
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#define IEEE_TRAP_ENABLE_MASK (IEEE_TRAP_ENABLE_INV | IEEE_TRAP_ENABLE_DZE |\
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IEEE_TRAP_ENABLE_OVF | IEEE_TRAP_ENABLE_UNF |\
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IEEE_TRAP_ENABLE_INE | IEEE_TRAP_ENABLE_DNO)
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/* Denorm and Underflow flushing */
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#define IEEE_MAP_DMZ (1UL<<12) /* Map denorm inputs to zero */
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#define IEEE_MAP_UMZ (1UL<<13) /* Map underflowed outputs to zero */
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#define IEEE_MAP_MASK (IEEE_MAP_DMZ | IEEE_MAP_UMZ)
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/* status bits coming from fpcr: */
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#define IEEE_STATUS_INV (1UL<<17)
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#define IEEE_STATUS_DZE (1UL<<18)
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#define IEEE_STATUS_OVF (1UL<<19)
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#define IEEE_STATUS_UNF (1UL<<20)
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#define IEEE_STATUS_INE (1UL<<21)
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#define IEEE_STATUS_DNO (1UL<<22)
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#define IEEE_STATUS_MASK (IEEE_STATUS_INV | IEEE_STATUS_DZE | \
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IEEE_STATUS_OVF | IEEE_STATUS_UNF | \
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IEEE_STATUS_INE | IEEE_STATUS_DNO)
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#define IEEE_SW_MASK (IEEE_TRAP_ENABLE_MASK | \
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IEEE_STATUS_MASK | IEEE_MAP_MASK)
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#define IEEE_CURRENT_RM_SHIFT 32
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#define IEEE_CURRENT_RM_MASK (3UL<<IEEE_CURRENT_RM_SHIFT)
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#define IEEE_STATUS_TO_EXCSUM_SHIFT 16
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#define IEEE_INHERIT (1UL<<63) /* inherit on thread create? */
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/*
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* Convert the software IEEE trap enable and status bits into the
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* hardware fpcr format.
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*
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* Digital Unix engineers receive my thanks for not defining the
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* software bits identical to the hardware bits. The chip designers
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* receive my thanks for making all the not-implemented fpcr bits
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* RAZ forcing us to use system calls to read/write this value.
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*/
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static inline unsigned long
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ieee_swcr_to_fpcr(unsigned long sw)
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{
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unsigned long fp;
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fp = (sw & IEEE_STATUS_MASK) << 35;
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fp |= (sw & IEEE_MAP_DMZ) << 36;
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fp |= (sw & IEEE_STATUS_MASK ? FPCR_SUM : 0);
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fp |= (~sw & (IEEE_TRAP_ENABLE_INV
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| IEEE_TRAP_ENABLE_DZE
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| IEEE_TRAP_ENABLE_OVF)) << 48;
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fp |= (~sw & (IEEE_TRAP_ENABLE_UNF | IEEE_TRAP_ENABLE_INE)) << 57;
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fp |= (sw & IEEE_MAP_UMZ ? FPCR_UNDZ | FPCR_UNFD : 0);
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/*
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* Disable denormal operand traps only when denormal inputs are to be
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* flushed to zero. Otherwise they must keep trapping, so that /S
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* instructions reach the kernel emulation handler.
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*/
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fp |= (sw & IEEE_MAP_DMZ ? FPCR_DNOD : 0);
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return fp;
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}
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static inline unsigned long
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ieee_fpcr_to_swcr(unsigned long fp)
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{
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unsigned long sw;
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sw = (fp >> 35) & IEEE_STATUS_MASK;
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sw |= (fp >> 36) & IEEE_MAP_DMZ;
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sw |= (~fp >> 48) & (IEEE_TRAP_ENABLE_INV
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| IEEE_TRAP_ENABLE_DZE
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| IEEE_TRAP_ENABLE_OVF);
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sw |= (~fp >> 57) & (IEEE_TRAP_ENABLE_UNF | IEEE_TRAP_ENABLE_INE);
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sw |= (fp >> 47) & IEEE_MAP_UMZ;
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return sw;
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}
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#endif /* _UAPI__ASM_ALPHA_FPU_H */
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