Andre Przywara a3eebcb61f dts: add riscv include prefix link ...

The Allwinner D1/D1s SoCs (with a RISC-V core) use an (almost?) identical
die as their R528/T113-s siblings with ARM Cortex-A7 cores.

To allow sharing the basic SoC .dtsi files across those two
architectures as well, introduce a symlink to the RISC-V DT directory.

Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Acked-by: Palmer Dabbelt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>

2023-03-27 22:45:22 +02:00

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arc

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arm

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arm64

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dt-bindings

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microblaze

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mips

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nios2

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openrisc

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powerpc

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riscv

dts: add riscv include prefix link

2023-03-27 22:45:22 +02:00

sh

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xtensa

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