Cast to a __user pointer via "unsigned long" to get rid of this warning:
include2/asm/compat.h:135:10: warning: cast adds address space to expression (<asn:1>)
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (34 commits)
PCI: Only build PCI syscalls on architectures that want them
PCI: limit pci_get_bus_and_slot to domain 0
PCI: hotplug: acpiphp: avoid acpiphp "cannot get bridge info" PCI hotplug failure
PCI: hotplug: acpiphp: remove hot plug parameter write to PCI host bridge
PCI: hotplug: acpiphp: fix slot poweroff problem on systems without _PS3
PCI: hotplug: pciehp: wait for 1 second after power off slot
PCI: pci_set_power_state(): check for PM capabilities earlier
PCI: cpci_hotplug: Convert to use the kthread API
PCI: add pci_try_set_mwi
PCI: pcie: remove SPIN_LOCK_UNLOCKED
PCI: ROUND_UP macro cleanup in drivers/pci
PCI: remove pci_dac_dma_... APIs
PCI: pci-x-pci-express-read-control-interfaces cleanups
PCI: Fix typo in include/linux/pci.h
PCI: pci_ids, remove double or more empty lines
PCI: pci_ids, add atheros and 3com_2 vendors
PCI: pci_ids, reorder some entries
PCI: i386: traps, change VENDOR to DEVICE
PCI: ATM: lanai, change VENDOR to DEVICE
PCI: Change all drivers to use pci_device->revision
...
The only pseudo-legitimate MIPS user of genrtc was a systems that doesn't
have an RTC in hardware at all. At this point faking one is a little
pointless ...
To support multiple TC microthreads acting as "CPUs" within a VPE,
VPE-wide interrupt mask bits must be specially manipulated during
interrupt handling. To support legacy drivers and interrupt controller
management code, SMTC has a "backstop" to track and if necessary restore
the interrupt mask. This has some performance impact on interrupt service
overhead. Disable it only if you know what you are doing.
Signed-off-by: Ralf Baechle <[email protected]>
Also include tlbdebug.h in dump_tlb.c and r3k_dump_tlb.c.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
This patch is an workaround for these sparse warnings:
include2/asm/mmu_context.h:172:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:133:16: originally declared here
include2/asm/mmu_context.h:232:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:203:16: originally declared here
include2/asm/mmu_context.h:277:3: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:250:16: originally declared here
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
CKSEG1ADDR() returns unsigned int value on 32bit kernel. Cast it to
unsigned long to get rid of this warning:
include2/asm/io.h:215:12: warning: cast adds address space to expression (<asn:2>)
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
I'm not sure if this is going to fly, weak symbols work on the compilers I'm
using, but whether they work for all of the affected architectures I can't say.
I've cc'ed as many arch maintainers/lists as I could find.
But assuming they do, we can use a weak empty definition of
pcibios_add_platform_entries() to avoid having an empty definition on every
arch.
Signed-off-by: Michael Ellerman <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Using another systems defines is a safe way to get your code broken by
accident when that system is removed.
Signed-off-by: Ralf Baechle <[email protected]>
This patch is an workaround for these sparse warnings:
linux/include/linux/calc64.h:25:17: warning: symbol '__quot' shadows an earlier one
linux/include/linux/calc64.h:25:17: originally declared here
linux/include/linux/calc64.h:25:17: warning: symbol '__mod' shadows an earlier one
linux/include/linux/calc64.h:25:17: originally declared here
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached). Controllers on these SoCs are
placed in this segment.
This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi
controller driver instead of platform dependent codes.
This patch also removes dependencies to old RTC interfaces such as
rtc_mips_get_time, etc.
Signed-off-by: Atsushi Nemoto <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
SNI caches are using 128 L2 cache lines)
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Patch to add PCI support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Patch to add mips common support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Patch to add core platform support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.
Signed-off-by: Ralf Baechle <[email protected]>
This is to break the code of people who think they are supposed to scribble
into the pci device structure - it's off limits.
Signed-off-by: Ralf Baechle <[email protected]>
The current implementation of __pa() for 64-bits kernels with 32-bits
symbols is broken. In this configuration, we need 2 values for
PAGE_OFFSET, one in XKPHYS and the other in CKSEG0 space.
When the value in CKSEG0 space is used, it doesn't take into account
of PHYS_OFFSET. Even worse we can't redefine this value.
The patch restores CPHYSADDR() but in __pa()'s implementation because
it removes the need of 2 PAGE_OFFSET.
OTOH, CPHYSADDR() is quite bad when dealing with mapped kernels. So
this patch assumes there's no need to deal with such kernel in 64-bits
world.
Signed-off-by: Franck Bui-Huu <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
For platforms that use PHYS_OFFSET and do not use a mapped kernel,
this patch automatically adds PHYS_OFFSET into PAGE_OFFSET.
Therefore there are no more needs for them to redefine PAGE_OFFSET.
For mapped kernel, they need to redefine PAGE_OFFSET anyways.
Signed-off-by: Franck Bui-Huu <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
PAGE_OFFSET definition is now using CAC_BASE by default.
This patch also reorder some macros to make them appear
in the same order for both 32 and 64 bits configs.
It also makes use of const.h generic header file to
annotate constants.
Signed-off-by: Franck Bui-Huu <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
Before this patch, when a platform needed to customize one constant in
spaces.h, they need to redefine all of them.
Now they can just redefine one constant and include the generic file
header at the end:
#include <asm/mach-generic/spaces.h>
This patch doesn't allow to redefine CAC_BASE, IO_BASE and UNCAC_BASE
for 32 bits platforms because there's no need to do so.
This will avoid some macro duplications. It's important specially if
we'll add complex macros.
Signed-off-by: Franck Bui-Huu <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
delete mode 100644 include/asm-mips/mach-ip32/spaces.h
No point in adding yet another #ifdef for Loongson since all this mask is
being used for is converting an XKPHYS address into a physical address
anyway. So replace all definitions by one with the highest architectural
possible value.
Signed-off-by: Ralf Baechle <[email protected]>
This patch adds support for the generic GPIO API to Au1x00 boards. It requires
the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS
target using it, can you queue these patchset for 2.6.22 ? Thank you very
much in advance.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
"extern inline" will have different semantics with gcc 4.3, and
"static inline" is correct here.
Signed-off-by: Adrian Bunk <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
This updates the DMA whitelist in MIPS specific au1xxx ide
driver to use NULL instead of "ALL" as the wildcard.
Signed-off-by: Junio C Hamano <[email protected]>
Cc: Alan Cox <[email protected]>
Cc: Dave Jones <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Atsushi Nemoto