605 Commits
Author SHA1 Message Date
Marc Zyngier 2cc67425a9 Revert "interconnect: qcom: x1e80100: enable QoS configuration"
This reverts commit 5a8b2cc36e.

Since the introduction of this QoS change, X1 machines based on the
Purwa SoC (such as the Lenovo Mini X) take a hard reset at boot time.

Other machines based on Hamoa (such as the X1E001DE Snapdragon Devkit)
end-up with a similar hard reset while under load, most likely due to
the PCIe ports being starved of traffic.

Revert the whole thing until someone figures out what magic parameters
allow QoS to work in a sensible manner, as a usable machine is somehow
preferable to one that crashes efficiently.

Link: https://lore.kernel.org/all/[email protected]
Link: https://lore.kernel.org/all/[email protected]
Signed-off-by: Marc Zyngier <[email protected]>
Cc: Georgi Djakov <[email protected]>
Cc: Raviteja Laggyshetty <[email protected]>
Cc: Konrad Dybcio <[email protected]>
Cc: Abel Vesa <[email protected]>
Cc: Bjorn Andersson <[email protected]>
Cc: Mostafa Saleh <[email protected]>
Cc: Thorsten Leemhuis <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Reviewed-by: Mostafa Saleh <[email protected]>
Tested-by: Mostafa Saleh <[email protected]>
Closes: https://krzk.eu/#/builders/102/builds/70/steps/23/logs/warnings__3_
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-09-16 15:55:38 +03:00
Greg Kroah-Hartman 1f7267d804 Merge tag 'icc-7.3-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:

This pull request contains the following interconnect updates for
the 7.3-rc1 merge window:

- New driver for Maili SoC
- Add support for QoS on the SC8280XP SoC
- Add support for QoS on the x1e80100 SoC
- Add EPSS L3 scaling support for Shikra SoC
- Add COMPILE_TEST support for some platforms
- Misc tiny improvements and fixes

Signed-off-by: Georgi Djakov <[email protected]>

* tag 'icc-7.3-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: Fix use after free in icc_get() and of_icc_get_by_index()
  interconnect: debugfs-client: add NULL check for platform_device_alloc
  interconnect: qcom: simplify allocation
  interconnect: qcom: add COMPILE_TEST
  interconnect: qcom: add Maili interconnect provider driver
  dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC
  interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC
  dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm Shikra SoC
  interconnect: qcom: x1e80100: enable QoS configuration
  dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS
  interconnect: qcom: sc8280xp: Enable QoS configuration
  dt-bindings: interconnect: qcom,sc8280xp-rpmh: Add reg and clocks for QoS
2026-08-19 09:55:37 +02:00
Georgi Djakov 9621c81fd2 Merge branch 'icc-misc' into icc-next
* icc-misc
  interconnect: qcom: add COMPILE_TEST
  interconnect: qcom: simplify allocation
  interconnect: debugfs-client: add NULL check for platform_device_alloc
  interconnect: Fix use after free in icc_get() and of_icc_get_by_index()

Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 13:51:41 +03:00
Georgi Djakov 0752296461 Merge branch 'icc-maili' into icc-next
Add interconnect bindings and RPMh-based interconnect driver support for
the upcoming Qualcomm Maili SoC.

* icc-maili
  dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC
  interconnect: qcom: add Maili interconnect provider driver

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 13:51:09 +03:00
Georgi Djakov d5aee2777e Merge branch 'icc-shikra' into icc-next
Add Epoch Subsystem (EPSS) L3 scaling support on Qualcomm Shikra SoC.
EPSS hardware on Shikra is similar to other SoCs but supports only twelve
L3 frequency entries (LUT). Reading the LUT beyond supported frequencies
can expose incorrect frequencies.
Introduce new compatible to represent this constrained variant of EPSS.

* icc-shikra
  dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm Shikra SoC
  interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 13:50:47 +03:00
Kuan-Wei Chiu 25c7e242ac interconnect: Fix use after free in icc_get() and of_icc_get_by_index()
In of_icc_get_by_index() and icc_get(), if the dynamic allocation for
path->name fails via kasprintf(), the error handling path directly
calls kfree(path) to free the path object and returns an error.

However, prior to this point, path_find() calls path_init(), which
already links the path's requests into the req_list of the respective
interconnect nodes via hlist_add_head(). Directly invoking kfree(path)
leaves dangling pointers in the hlist. A subsequent call to icc_get()
or icc_set_bw() will traverse or modify these corrupted lists, triggering
a slab use afterfree.

KASAN report showing the vulnerability when reproducing via debugfs:

  BUG: KASAN: slab-use-after-free in path_find+0x6f8/0xcfc
  Write of size 8 at addr fff000000d43f748 by task sh/1
  ...
  Call trace:
   kasan_report+0xac/0xfc
   path_find+0x6f8/0xcfc
   icc_get+0x148/0x380
   icc_get_set+0xf8/0x2d0
  ...
  Freed by task 1:
   kfree+0x1a0/0x4a4
   icc_get+0x2cc/0x380
   icc_get_set+0xf8/0x2d0

Fix this by replacing kfree(path) with the proper teardown function,
icc_put(path), which safely removes the requests from the req_list using
hlist_del() and drops the provider usage references before freeing the
memory.

Additionally, in icc_get(), ensure that the icc_lock mutex is released
prior to calling icc_put(path) to avoid a deadlock, as icc_put()
internally acquires the same lock.

Fixes: 3791163602 ("interconnect: Handle memory allocation errors")
Cc: [email protected]
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 13:38:11 +03:00
Li Jun ecf20a5e15 interconnect: debugfs-client: add NULL check for platform_device_alloc
platform_device_alloc() may return NULL when memory allocation fails.
Add proper error handling to prevent a potential NULL pointer
dereference when calling platform_device_add() with a NULL pointer.

Signed-off-by: Li Jun <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 12:36:47 +03:00
Rosen Penev bd8a131fbe interconnect: qcom: simplify allocation
Use a flexible array member to reduce allocation by 1.

Add __counted_by for extra runtime analysis. Move counting variable
assignment after allocation before any array access.

Signed-off-by: Rosen Penev <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 12:14:24 +03:00
Rosen Penev c96fc14322 interconnect: qcom: add COMPILE_TEST
Allow non-ARM to build this.

Signed-off-by: Rosen Penev <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-22 12:13:57 +03:00
Raviteja Laggyshetty fb8190f09b interconnect: qcom: add Maili interconnect provider driver
Add driver for the Qualcomm interconnect buses found in Maili
based platforms. The topology consists of several NoCs that are
controlled by a remote processor that collects the aggregated
bandwidth for each master-slave pairs.

Co-developed-by: Odelu Kukatla <[email protected]>
Signed-off-by: Odelu Kukatla <[email protected]>
Signed-off-by: Raviteja Laggyshetty <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-07 17:18:03 +03:00
Raviteja Laggyshetty b148c1f785 interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC
Add Epoch Subsystem (EPSS) L3 interconnect provider support on
Qualcomm Shikra SoC.

The EPSS L3 block on Shikra SoC is similar to existing Qualcomm EPSS/OSM
L3 providers, but supports only up to 12 frequency lookup table entries.
Reading beyond the supported LUT entries can expose incorrect frequencies.
Add shikra-specific EPSS descriptor shikra_epss_l3_perf_state that reuses
existing EPSS configuration with appropriate LUT entries limit.

Co-developed-by: Odelu Kukatla <[email protected]>
Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Raviteja Laggyshetty <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-07 17:06:52 +03:00
Georgi Djakov 3b828034ad Merge branch 'icc-x1e80100' into icc-next
This series enables QoS configuration for QNOC type device which
can be found on X1E80100 platform. It enables QoS configuration
for master ports with predefined priority and urgency forwarding.
This helps in prioritizing the traffic originating from different
interconnect masters at NOC (Network On Chip).

The system may function normally without this feature. However,
enabling QoS helps optimize latency and bandwidth across subsystems
like CPU, GPU, and multimedia engines, which becomes important in
high-throughput scenarios. This is a feature aimed at performance
enhancement to improve system performance under concurrent workloads.

* icc-x1e80100
  dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS
  interconnect: qcom: x1e80100: enable QoS configuration

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-07 16:32:56 +03:00
Raviteja Laggyshetty 5a8b2cc36e interconnect: qcom: x1e80100: enable QoS configuration
Enable QoS configuration for master ports with predefined priority
and urgency forwarding.

Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Raviteja Laggyshetty <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-07 16:32:10 +03:00
Xilin Wu 3ee8b9b7c4 interconnect: qcom: sc8280xp: Enable QoS configuration
Enable static QoS configuration for SC8280XP NoC master ports with
predefined priority and urgency forwarding values.

Add the QoS box data for the SC8280XP providers, add regmap configurations
for the real NoCs, and mark only aggre1_noc and aggre2_noc as requiring
clocks for QoS register access.

Signed-off-by: Xilin Wu <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-07-07 14:54:21 +03:00
Uwe Kleine-König (The Capable Hub) 995832b2ce Replace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c files)
Replace the #include of <linux/mod_devicetable.h> by the more specific
<linux/device-id/*.h> where applicable. For most cases the include
can be dropped completely, only a few drivers need one or two headers
added.

Acked-by: Danilo Krummrich <[email protected]>
Acked-by: Takashi Sakamoto <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König (The Capable Hub) <[email protected]>
2026-07-03 07:38:17 +02:00
Linus Torvalds 8c04c1292d Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "This is all clk driver updates. Mostly new SoC support for various
  Qualcomm chips and Canaan K230. Otherwise there's non-critical fixes
  and updates to clk data such as adding missing clks to existing
  drivers or marking clks critical. Nothing looks especially exciting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (106 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
  clk: at91: keep securam node alive while mapping it
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  ...
2026-06-25 12:48:57 -07:00
Luca Weiss 771ed1b129 interconnect: Add devm_of_icc_get_by_index() as exported API for users
Users can use devm version of of_icc_get_by_index() to benefit from
automatic resource release.

Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
Acked-by: Georgi Djakov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
2026-06-06 19:51:14 -05:00
Georgi Djakov 94fe92d2f6 Merge branch 'icc-misc' into icc-next
* icc-misc
  interconnect: Do not create empty devres on missing interconnects
  interconnect: Move MODULE_DEVICE_TABLE next to the table itself
  dt-bindings: interconnect: qcom,sdm660: Disallow clocks when appropriate
  dt-bindings: interconnect: qcom,sm6115: Drop incorrect children if:then: block
  dt-bindings: interconnect: qcom,sm6115: Restrict children and clocks
  interconnect: qcom: Fix indentation
  interconnect: qcom: Restrict drivers per ARM/ARM64

Signed-off-by: Georgi Djakov <[email protected]>
2026-05-22 10:41:01 +03:00
Georgi Djakov 0d0a40e3f8 Merge branch 'icc-hawi' into icc-next
Add interconnect bindings and RPMh-based interconnect
driver support for the upcoming Qualcomm Hawi SoC.

* icc-hawi
  dt-bindings: interconnect: qcom-bwmon: Add Hawi cpu-bwmon compatible
  dt-bindings: interconnect: qcom-bwmon: Add Hawi llcc-bwmon compatible
  dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC
  interconnect: qcom: add Hawi interconnect provider driver

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-21 22:52:10 +03:00
Vivek Aknurwar ffaa88a084 interconnect: qcom: add Hawi interconnect provider driver
Add driver for the Qualcomm interconnect buses found in Hawi
based platforms. The topology consists of several NoCs that are
controlled by a remote processor that collects the aggregated
bandwidth for each master-slave pair.

Reviewed-by: Mike Tipton <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Vivek Aknurwar <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-21 22:51:30 +03:00
Georgi Djakov 67a4412db0 Merge branch 'icc-eliza' into icc-next
Add the missing Eliza SDCC1 interconnect slave ID and provider node.

The Eliza interconnect binding and provider already describe SDCC2, but
the matching SDCC1 CNOC CFG slave was left out. Add the binding constant
and the provider node so consumers can describe SDCC1 bandwidth paths.

The provider change also adds qhs_sdc1 to qsm_cfg and bcm_cn0, and updates
the qsm_cfg link count and bcm_cn0 node count.

* icc-eliza
  dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave
  interconnect: qcom: eliza: Add SDCC1 slave node

Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-0-13c03bc890cb@oss.qualcomm.com
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-21 20:58:17 +03:00
Georgi Djakov 21f951515a Merge branch 'icc-nord' into icc-next
This adds RPMh-based interconnect support for the Qualcomm Nord SoC.

The Nord SoC features a rich Network-on-Chip topology comprising 19 NoCs
including aggregate NoCs, a high-speed configuration NoC (HSCNOC), a
multimedia NoC, four NSP data NoCs for AI/ML workloads, PCIe inbound and
outbound NoCs, a system NoC, and virtual clock/MC nodes. Bandwidth requests
are communicated to the RPMh hardware through Bus Clock Manager (BCM)
resources via the Resource State Coordinator (RSC).

* icc-nord
  dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC
  interconnect: qcom: Add interconnect provider driver for Nord SoC

Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-21 20:57:37 +03:00
Abel Vesa caeab82fbe interconnect: qcom: eliza: Add SDCC1 slave node
The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
node. Add qhs_sdc1 to the provider node table so SDCC1 interconnect
paths can resolve to a provider node.

Hook qhs_sdc1 up to qsm_cfg and CN0, and bump the corresponding
qsm_cfg.num_links and bcm_cn0.num_nodes counts.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-2-13c03bc890cb@oss.qualcomm.com
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-15 10:21:19 +03:00
Krzysztof Kozlowski 5b696f0658 interconnect: qcom: Restrict drivers per ARM/ARM64
There is no point to allow selecting core SoC drivers like interconnects
for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa.

This makes kernel configuration more difficult as many do not remember
the Qualcomm SoCs model names/numbers and their properties like
architecture.  No features should be lost because:
1. There won't be a single image for ARMv7 and ARMv8/9 SoCs.
2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-2-e6bc3f7832db@oss.qualcomm.com
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 13:18:48 +03:00
Krzysztof Kozlowski 271560880a interconnect: qcom: Fix indentation
KConfig entries should be indented starting with one tab, so replace
spaces with it.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://patch.msgid.link/20260428-interconnect-qcom-clean-arm64-v1-1-e6bc3f7832db@oss.qualcomm.com
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 13:18:36 +03:00
Krzysztof Kozlowski 5f00d6e5bd interconnect: Move MODULE_DEVICE_TABLE next to the table itself
By convention MODULE_DEVICE_TABLE() immediately follows the ID table it
exports, because this is easier to read and verify.  It also makes more
sense since #ifdef for ACPI or OF could hide both of them.

Most of the privers already have this correctly placed, so adjust
the missing ones.  No functional impact.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 12:29:14 +03:00
Krzysztof Kozlowski 7562778563 interconnect: Do not create empty devres on missing interconnects
of_icc_get() returns NULL on valid case - no interconnects - but no
need to create devres for that, because it just wastes memory without
any use/benefits.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 12:25:34 +03:00
Odelu Kukatla 010f4d24cc interconnect: qcom: Add interconnect provider driver for Nord SoC
Add driver for the Qualcomm interconnect buses found on Nord SoC.
The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pair.

Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 12:12:10 +03:00
Raviteja Laggyshetty 24761ddafd interconnect: qcom: add Shikra interconnect provider driver
Add driver for the Qualcomm interconnect buses found in Shikra
based platforms. The topology consists of several NoCs that are
controlled by a remote processor that collects the aggregated
bandwidth for each master-slave pairs.

Co-developed-by: Odelu Kukatla <[email protected]>
Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Raviteja Laggyshetty <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-05-10 12:11:11 +03:00
Greg Kroah-Hartman 0990a71f67 Merge tag 'icc-7.1-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:

This pull request contains the interconnect changes for the 7.1-rc1
merge window. They are listed below:

- New driver for Mahua SoC
- New driver for Eliza SoC
- Enable QoS support for QCS8300 and QCS615 SoCs
- Add L3 cache scaling compatibles for SM8550 and Eliza SoCs
- Fix multiple issues in the msm8974 driver
- Fix kfree mismatch
- Misc cleanups
- Add maintainer entry for the interconnect KUnit tests

Signed-off-by: Georgi Djakov <[email protected]>

* tag 'icc-7.1-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (22 commits)
  MAINTAINERS: Add interconnect kunit test entry
  interconnect: debugfs: fix devm_kstrdup and kfree mismatch
  interconnect: qcom: msm8974: expand DEFINE_QNODE macros
  interconnect: qcom: msm8974: switch to the main icc-rpm driver
  interconnect: qcom: let platforms declare their bugginess
  interconnect: qcom: define OCMEM bus resource
  interconnect: qcom: icc-rpm: allow overwriting get_bw callback
  interconnect: qcom: drop unused is_on flag
  dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common
  dt-bindings: interconnect: qcom,msm8974: drop bus clocks
  interconnect: qcom: qcs615: enable QoS configuration
  dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS
  interconnect: qcom: Add Eliza interconnect provider driver
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC
  dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatible
  interconnect: qcom: De-acronymize SoC names
  dt-bindings: interconnect: qcom,glymur-rpmh: De-acronymize SoC name
  dt-bindings: interconnect: OSM L3: Document sm8550 OSM L3 compatible
  interconnect: qcom: qcs8300: enable QoS configuration
  dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS
  ...
2026-04-07 10:06:50 +02:00
Gui-Dong Han 028f3d0168 interconnect: debugfs: fix devm_kstrdup and kfree mismatch
debugfs_write_file_str() uses standard kfree() to release old strings.
Initializing src_node and dst_node with devm_kstrdup() creates a memory
management mismatch. If a user writes to these debugfs nodes, the
devm-allocated memory is freed via kfree(), leaving a dangling pointer
in the device resource list that can lead to a double free.

Fix this by using standard kstrdup() instead. Since the interconnect
subsystem is strictly built-in and cannot be unloaded as a module, there
is no exit path requiring manual cleanup of these strings. The error
handling path is also simplified by taking advantage of the fact that
kfree(NULL) is a safe no-op.

Fixes: 8cc27f5c6d ("interconnect: debugfs: initialize src_node and dst_node to empty strings")
Signed-off-by: Gui-Dong Han <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-04-02 10:39:01 +03:00
Georgi Djakov be0df73d5f Merge branch 'icc-msm8974' into icc-next
Commit d6edc31f3a ("clk: qcom: smd-rpm: Separate out interconnect bus
clocks") moved control over several RPM resources from the clk-smd-rpm
driver to the icc-rpm.c interconnect helpers. Most of the platforms were
fixed before that commit or shortly after. However the MSM8974 was left
as a foster child in broken state. Fix the loose ends and reenable
interconnects on that platform.

* icc-msm8974
  dt-bindings: interconnect: qcom,msm8974: drop bus clocks
  dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common
  interconnect: qcom: drop unused is_on flag
  interconnect: qcom: icc-rpm: allow overwriting get_bw callback
  interconnect: qcom: define OCMEM bus resource
  interconnect: qcom: let platforms declare their bugginess
  interconnect: qcom: msm8974: switch to the main icc-rpm driver
  interconnect: qcom: msm8974: expand DEFINE_QNODE macros

Link: https://msgid.link/[email protected]
Tested-by: Alexandre Messier <[email protected]>
Tested-by: Luca Weiss <[email protected]> # fairphone-fp2
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-27 12:12:36 +02:00
Dmitry Baryshkov 39ecfef483 interconnect: qcom: msm8974: expand DEFINE_QNODE macros
The rest of Qualcomm Interconnect drivers have stopped using
DEFINE_QNODE long ago for the sake of readability. Stop using it inside
the msm8974 interconnect driver too.

Acked-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:10:07 +02:00
Dmitry Baryshkov aa60d907b3 interconnect: qcom: msm8974: switch to the main icc-rpm driver
In preparation to restoring the ability of MSM8974 driver to work with
the modern kernels, switch the driver to the main icc-rpm set of helper
code.

As platform-specific workarounds, set the get_bw callback (returning 0)
to prevent initial setup from programming INT_MAX into the RPM (which
otherwise might hang the platform) and tell RPM programming code to
ignore -ENXIO errors from the firmware (until the QoS programming is
sorted out).

Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:09:55 +02:00
Dmitry Baryshkov 91cfd1604f interconnect: qcom: let platforms declare their bugginess
On MSM8974 programming some of the RPM resources results in the
"resource does not exist" messages from the firmware. This occurs even
with the downstream bus driver, which happily ignores the errors. My
assumption is that these resources existed in the earlier firmware
revisions but were later switched to be programmed differently (for the
later platforms corresponding nodes use qos.ap_owned, which prevents
those resources from being programmed.

In preparation for conversion of the MSM8974 driver (which doesn't have
QoS code yet) to the main icc-rpm set of helpers, let the driver declare
that those -ENXIO errors must be ignored (for now). Later, when the QoS
programming is sorted out (and more interconnects are added to the DT),
this quirk might be removed.

Reviewed-by: Brian Masney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:09:47 +02:00
Dmitry Baryshkov 1d5b5f7d75 interconnect: qcom: define OCMEM bus resource
Some of the platforms (MSM8974, MSM8x26) require voting on the OCMEM
clock. Add new resource for that clock.

Reviewed-by: Brian Masney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:09:35 +02:00
Dmitry Baryshkov fba5454ef5 interconnect: qcom: icc-rpm: allow overwriting get_bw callback
MSM8974 requires a separate get_bw callback, since on that platform
increasing the clock rate for some of the NoCs during boot may lead to
hangs. For the details see commit 9caf2d956c ("interconnect: qcom:
msm8974: Don't boost the NoC rate during boot").

Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:09:26 +02:00
Dmitry Baryshkov b8498af901 interconnect: qcom: drop unused is_on flag
The commit 2e2113c8a6 ("interconnect: qcom: rpm: Handle interface
clocks") has added the is_on flag to the qcom_icc_provider, but failed
to actually utilize it. Drop the flag.

Fixes: 2e2113c8a6 ("interconnect: qcom: rpm: Handle interface clocks")
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-26 20:09:20 +02:00
Georgi Djakov 9bc3b976eb Merge branch 'icc-qcs615' into icc-next
This series enables QoS configuration for QNOC type device which
can be found on QCS615 platform. It enables QoS configuration
for master ports with predefined priority and urgency forwarding.
This helps in prioritizing the traffic originating from different
interconnect masters at NOC (Network On Chip).

The system may function normally without this feature. However,
enabling QoS helps optimize latency and bandwidth across subsystems
like CPU, GPU, and multimedia engines, which becomes important in
high-throughput scenarios. This is a feature aimed at performance
enhancement to improve system performance under concurrent workloads.

* icc-qcs615
  dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS
  interconnect: qcom: qcs615: enable QoS configuration

Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-17 12:57:00 +02:00
Odelu Kukatla 50a9b75d77 interconnect: qcom: qcs615: enable QoS configuration
Enable QoS configuration for master ports with predefined priority
and urgency forwarding.

Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-17 12:42:48 +02:00
Vladimir Zapolskiy dbbd550d7c interconnect: qcom: sm8450: Fix NULL pointer dereference in icc_link_nodes()
The change to dynamic IDs for SM8450 platform interconnects left two links
unconverted, fix it to avoid the NULL pointer dereference in runtime,
when a pointer to a destination interconnect is not valid:

    Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008
    <...>
    Call trace:
      icc_link_nodes+0x3c/0x100 (P)
      qcom_icc_rpmh_probe+0x1b4/0x528
      platform_probe+0x64/0xc0
      really_probe+0xc4/0x2a8
      __driver_probe_device+0x80/0x140
      driver_probe_device+0x48/0x170
      __device_attach_driver+0xc0/0x148
      bus_for_each_drv+0x88/0xf0
      __device_attach+0xb0/0x1c0
      device_initial_probe+0x58/0x68
      bus_probe_device+0x40/0xb8
      deferred_probe_work_func+0x90/0xd0
      process_one_work+0x15c/0x3c0
      worker_thread+0x2e8/0x400
      kthread+0x150/0x208
      ret_from_fork+0x10/0x20
     Code: 900310f4 911d6294 91008280 94176078 (f94002a0)
     ---[ end trace 0000000000000000 ]---
     Kernel panic - not syncing: Oops: Fatal exception

Fixes: 51513bec80 ("interconnect: qcom: sm8450: convert to dynamic IDs")
Signed-off-by: Vladimir Zapolskiy <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-14 12:53:13 +02:00
Georgi Djakov 3e90f5103a Merge branch 'icc-qcs8300' into icc-next
This series enables QoS configuration for QNOC type device which
can be found on QCS8300 platform. It enables QoS configuration
for master ports with predefined priority and urgency forwarding.
This helps in prioritizing the traffic originating from different
interconnect masters at NOC (Network On Chip).
The system may function normally without this feature. However,
enabling QoS helps optimize latency and bandwidth across subsystems
like CPU, GPU, and multimedia engines, which becomes important in
high-throughput scenarios. This is a feature aimed at performance
enhancement to improve system performance under concurrent workloads.

* icc-qcs8300
  dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS
  interconnect: qcom: qcs8300: enable QoS configuration

Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:39:37 +02:00
Georgi Djakov 086502e935 Merge branch 'icc-mahua' into icc-next
Mahua is a derivative of the Glymur SoC and shares a significant
portion of its interconnect topology with Glymur. As such, this
series extends the existing Glymur interconnect driver to support
Mahua, reusing common definitions where possible and adding
SoC-specific configurations where necessary.

* icc-mahua
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC
  interconnect: qcom: glymur: Add Mahua SoC support

Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:38:48 +02:00
Georgi Djakov b6adc224b7 Merge branch 'icc-eliza' into icc-next
Add interconnect support for the Qualcomm Eliza SoC.

* icc-eliza
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Eliza SoC
  interconnect: qcom: Add Eliza interconnect provider driver
  dt-bindings: interconnect: OSM L3: Add Eliza EPSS L3 compatible

Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:37:35 +02:00
Odelu Kukatla a39efc80ff interconnect: qcom: Add Eliza interconnect provider driver
Add driver for the Qualcomm interconnect buses found in Eliza
based platforms. The topology consists of several NoCs that are
controlled by a remote processor that collects the aggregated
bandwidth for each master-slave pairs.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Odelu Kukatla <[email protected]>
Signed-off-by: Abel Vesa <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:32:11 +02:00
Krzysztof Kozlowski 26078bbdad interconnect: qcom: De-acronymize SoC names
Glymur and Kaanapali are codenames of Qualcomm SoCs, not acronyms.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:24:30 +02:00
Odelu Kukatla bc888ba1d4 interconnect: qcom: qcs8300: enable QoS configuration
Enable QoS configuration for master ports with predefined priority
and urgency forwarding.

Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 14:05:38 +02:00
Raviteja Laggyshetty dfff14a4a4 interconnect: qcom: glymur: Add Mahua SoC support
Mahua is a derivative of the Glymur SoC. Extend the
Glymur driver to support Mahua by:

  1. Adding new node definitions for interconnects that differ from Glymur
     (Config NoC, High-Speed Coherent NoC, PCIe West ANOC/Slave NoC).
  2. Reusing existing Glymur definitions for identical NoCs.
  3. Overriding the channel and buswidth, with Mahua specific values for
     the differing NoCs

Co-developed-by: Odelu Kukatla <[email protected]>
Signed-off-by: Odelu Kukatla <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Raviteja Laggyshetty <[email protected]>
Link: https://msgid.link/[email protected]
Signed-off-by: Georgi Djakov <[email protected]>
2026-03-06 13:57:24 +02:00
Linus Torvalds 323bbfcf1e Convert 'alloc_flex' family to use the new default GFP_KERNEL argument
This is the exact same thing as the 'alloc_obj()' version, only much
smaller because there are a lot fewer users of the *alloc_flex()
interface.

As with alloc_obj() version, this was done entirely with mindless brute
force, using the same script, except using 'flex' in the pattern rather
than 'objs*'.

Signed-off-by: Linus Torvalds <[email protected]>
2026-02-21 17:09:51 -08:00
Linus Torvalds bf4afc53b7 Convert 'alloc_obj' family to use the new default GFP_KERNEL argument
This was done entirely with mindless brute force, using

    git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds <[email protected]>
2026-02-21 17:09:51 -08:00