119 Commits
Author SHA1 Message Date
Harry VanZyllDeJong 3df68ac6a7 drm/amd/display: Update VRR info packet to support 12-bit refresh rates
[Why]
VRR info packet previously only supported up to 10-bit refresh rate values
limiting the range of FreeSync minimum and maximum refresh rates that
could be encoded.

[How]
Expanded the bit masking in PB11/PB12 from 2 to 4 bits to capture bits
11:8 of the minimum and maximum FreeSync refresh rates, enabling the VRR
info packet to encode 12-bit refresh rate values.

Reviewed-by: Anthony Koo <[email protected]>
Signed-off-by: Harry VanZyllDeJong <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Dan Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2026-08-06 09:58:25 -04:00
Gaghik Khachatrian 355408042a drm/amd/display: Fix implicit narrowing conversions in modules
[Why]: Implicit narrowing of wider integer types (unsigned int, uint64_t)
into narrower fields (uint8_t, uint16_t, unsigned short) has potential
truncation issues.

[How]: For each warning site, added ASSERT(<value> <= 0xFFFF/0xFF) for
debug-mode bounds verification followed by an explicit cast. Typed
intermediate variables introduced where needed for clarity.

No functional change intended.

Reviewed-by: Dillon Varone <[email protected]>
Signed-off-by: Gaghik Khachatrian <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Dan Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2026-04-17 15:21:29 -04:00
Gaghik Khachatrian 60e8ffaf96 drm/amd/display: Fix Silence warnings
Also affects: freesync, hdcp, info_packet, power

[Why] Resolve compiler warnings by marking unused parameters explicitly.

[How] In .c/.h keep parameter names in signatures and add a line with
      `(void)param;`  inside the function body

Preserved function signatures and avoids breaking code paths that
may reference the parameter under conditional compilation.

Reviewed-by: Aric Cyr <[email protected]>
Signed-off-by: Gaghik Khachatrian <[email protected]>
Signed-off-by: Chuanyu Tseng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2026-03-23 14:15:31 -04:00
Linus Torvalds bf4afc53b7 Convert 'alloc_obj' family to use the new default GFP_KERNEL argument
This was done entirely with mindless brute force, using

    git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' |
        xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/'

to convert the new alloc_obj() users that had a simple GFP_KERNEL
argument to just drop that argument.

Note that due to the extreme simplicity of the scripting, any slightly
more complex cases spread over multiple lines would not be triggered:
they definitely exist, but this covers the vast bulk of the cases, and
the resulting diff is also then easier to check automatically.

For the same reason the 'flex' versions will be done as a separate
conversion.

Signed-off-by: Linus Torvalds <[email protected]>
2026-02-21 17:09:51 -08:00
Kees Cook 69050f8d6d treewide: Replace kmalloc with kmalloc_obj for non-scalar types
This is the result of running the Coccinelle script from
scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to
avoid scalar types (which need careful case-by-case checking), and
instead replace kmalloc-family calls that allocate struct or union
object instances:

Single allocations:	kmalloc(sizeof(TYPE), ...)
are replaced with:	kmalloc_obj(TYPE, ...)

Array allocations:	kmalloc_array(COUNT, sizeof(TYPE), ...)
are replaced with:	kmalloc_objs(TYPE, COUNT, ...)

Flex array allocations:	kmalloc(struct_size(PTR, FAM, COUNT), ...)
are replaced with:	kmalloc_flex(*PTR, FAM, COUNT, ...)

(where TYPE may also be *VAR)

The resulting allocations no longer return "void *", instead returning
"TYPE *".

Signed-off-by: Kees Cook <[email protected]>
2026-02-21 01:02:28 -08:00
Ivan Lipski 33c9957091 drm/amd/display: Allow VRR params change if unsynced with the stream
[Why]
When changing resolution (e.g., 4K → FHD) in mirror/clone mode with
certain monitors, the monitor blanks and loses connection due to an early
exit in vrr_settings_require_update(). The function only checks if VRR
state, fixed refresh target, or min/max refresh rate range has changed.

During mode changes, if the calculated min/max refresh values remain the
same even though the stream's v_total changed, the function returns early
without updating vrr_params.adjust.v_total_min/max, leaving the monitor's
VRR timing parameters unsynced with the new mode, causing it to blank out.

[How]
Explicitly adjust VRR parameters to the stream's nominal v_total when VRR
is supported, but inactive.

Fixes: 6d31602a9f ("drm/amd/display: more liberal vmin/vmax update for freesync")
Reviewed-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Ivan Lipski <[email protected]>
Signed-off-by: Fangzhi Zuo <[email protected]>
Tested-by: Dan Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
(cherry picked from commit 607df8248a)
2025-11-11 22:50:53 -05:00
Liao Yuanhong 53c271b9a0 drm/amd/display: Remove redundant ternary operators
For ternary operators in the form of "a ? true : false" or
"a ? false : true", if 'a' itself returns a boolean result, the ternary
operator can be omitted. Remove redundant ternary operators to clean up the
code.

Signed-off-by: Liao Yuanhong <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2025-09-05 17:38:39 -04:00
Harold Sun fe7645d22b drm/amd/display: Added case for when RR equals panel's max RR using freesync
[WHY]
Rounding error sometimes occurs when the refresh rate is equal to a panel's
max refresh rate, causing HDMI compliance failures.

[HOW]
Added a case so that we round up to avoid v_total_min to be below a panel's
minimum bound.

Reviewed-by: Jun Lei <[email protected]>
Signed-off-by: Harold Sun <[email protected]>
Signed-off-by: Ray Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2025-06-30 11:59:00 -04:00
Weiguang Li 6954103400 drm/amd/display: Remove redundant macro of refresh rate
[Why&How]
Found that we add redundant macro on refresh rate when calculating vtotal,
so we remove it.

Reviewed-by: Robin Chen <[email protected]>
Signed-off-by: Weiguang Li <[email protected]>
Signed-off-by: Fangzhi Zuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2025-06-24 09:55:58 -04:00
Dr. David Alan Gilbert 2d5e8a8997 drm/amd/display: Remove unused freesync functions
mod_freesync_get_vmin_vmax() and mod_freesync_get_v_position() were
added in 2017 by
commit 72ada5f769 ("drm/amd/display: FreeSync Auto Sweep Support")

mod_freesync_is_valid_range() was added in 2018 by
commit e80e944608 ("drm/amd/display: add method to check for supported
range")

mod_freesync_get_settings() was added in 2018 by
commit a3e1737ed6 ("drm/amd/display: Implement stats logging")

and
mod_freesync_calc_field_rate_from_timing() was added in 2020 by
commit 49c70ece54 ("drm/amd/display: Change input parameter for
set_drr")

None of these have been used.

Remove them.

Signed-off-by: Dr. David Alan Gilbert <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2025-02-12 21:03:02 -05:00
Dillon Varone a29997b7ac drm/amd/display: Limit VTotal range to max hw cap minus fp
[WHY & HOW]
Hardware does not support the VTotal to be between fp2 lines of the
maximum possible VTotal, so add a capability flag to track it and apply
where necessary.

Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Jun Lei <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Signed-off-by: Dillon Varone <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-12-02 18:35:28 -05:00
Charlene Liu d1fd30e511 drm/amd/display: avoid divided by zero
[why]
insert divided by zero protection

Reviewed-by: Alvin Lee <[email protected]>
Signed-off-by: Charlene Liu <[email protected]>
Signed-off-by: Zaeem Mohamed <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-11-04 11:33:40 -05:00
po-tchen aacbed5b41 drm/amd/display: Display lost signal on playing video
[Why]
When Source extend the vblank to reach the minimum panel
refresh rate, the vtotal length could have 1 line longer
than the maximum supported vtotal.
The reason is we optimized the vtotal/refresh-rate calculation
to get more accurate vtotal number by rounding the calculation
result. But when the target refresh rate is the minimum
refresh rate, the vtotal result could be round up and over
the maximum supported vtotal.

Reviewed-by: Anthony Koo <[email protected]>
Signed-off-by: po-tchen <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-10-07 14:11:49 -04:00
Robin Chen c03fca619f drm/amd/display: Round calculated vtotal
[WHY]
The calculated vtotal may has 1 line deviation. To get precisely
vtotal number, round the vtotal result.

Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Anthony Koo <[email protected]>
Signed-off-by: Robin Chen <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-09-18 16:15:06 -04:00
Alex Hung bbd0d1c942 drm/amd/display: Fix possible overflow in integer multiplication
[WHAT & HOW]
Integer multiplies integer may overflow in context that expects an
expression of unsigned/siged long long (64 bits). This can be fixed
by casting integer to unsigned/siged long long to force 64 bits results.

This fixes 26 OVERFLOW_BEFORE_WIDEN issues reported by Coverity.

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Jerry Zuo <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-07-01 16:06:53 -04:00
Rodrigo Siqueira bcebe44f6b drm/amd/display: Remove wrong signal from vrr calculation
In some of the merge conflict fixes, one '+' was accidentally left at
the beginning of the line. Fortunately, this did not cause any major
issues since it acted as a number signal. This commit addresses this
issue by removing the extra '+'.

Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-03-20 13:38:11 -04:00
Rodrigo Siqueira f1b8479dc9 drm/amd/display: Add comments to v_total calculation and drop legacy TODO
[WHY & HOW]
This commit just adds some simple comments to help understand the
calculation of V total duration for Freesync. Also, remove a legacy TODO
comment from link service type.

Acked-by: Alex Hung <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-03-20 13:37:38 -04:00
Robin Chen eed4edda91 drm/amd/display: Support long vblank feature
[WHY]
We want to support low hz case, but the original
vtotal/vtotal_min/vtotal_max can't support more
than 0x7FFF.

[HOW]
We use the 2 HW reg to contorl long vblank case.
1. OTG_V_COUNT_STOP_CONTROL -> vcount_stop
2. OTG_V_COUNT_STOP_CONTROL2 -> vcount_stop_timer

vcount_stop define from which line we stop using vcount
and start using vcount2.
vcount_stop_timer define how long we use vcount2.

Ex:
Vtotal = 7
OTG_V_COUNT_STOP_CONTROL = 4
OTG_V_COUNT_STOP_CONTROL2 = 5

time    : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
vcount  : 0, 1, 2, 3, -  -  -  -  -  4,  5,  6
vcount2 :             0, 1, 2, 3, 4,

Reviewed-by: Jun Lei <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: ChunTao Tso <[email protected]>
Signed-off-by: Robin Chen<[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-03-20 13:37:37 -04:00
Marcelo Mendes Spessoto Junior 0c3c952d05 drm/amd/display: Fix freesync.c codestyle
Remove braces for single statement if expression for freesync.c file

Signed-off-by: Marcelo Mendes Spessoto Junior <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2024-01-05 16:10:43 -05:00
Krunoslav Kovac c21a764a98 drm/amd/display: Send PQ bit in AMD VSIF
[WHY & HOW]
PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe.
This change sets it when appropriate.

Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: Krunoslav Kovac <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-11-17 09:30:50 -05:00
Muhammad Ansari 43693e859b drm/amd/display: VSIF v3 set Max Refresh Rate
[WHY]
FreeSync spec requires PB8 and PB12 to be set to nominal
refresh rate regardless of fixed rate or variable

[HOW]
Removed the condition that checks and overwrites max refresh rate
and set PB8/PB12 to be set to max refresh rate always

Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Muhammad Ansari <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-10-09 16:53:02 -04:00
Hamza Mahfooz 084f658ece drm/amd/display: prevent potential division by zero errors
There are two places in apply_below_the_range() where it's possible for
a divide by zero error to occur. So, to fix this make sure the divisor
is non-zero before attempting the computation in both cases.

Cc: [email protected]
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637
Fixes: a463b26303 ("drm/amd/display: Fix frames_to_insert math")
Fixes: ded6119e82 ("drm/amd/display: Reinstate LFC optimization")
Reviewed-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-09-06 14:32:39 -04:00
Austin Zheng da55037afd drm/amd/display: Limit Minimum FreeSync Refresh Rate
Why:
Some EDIDs report a minimum refresh rate lower than what HW can support

How:
Add a check to calculate minimum supported refresh rate with current timing
and use that as the minimum if a lower one is passed in

Acked-by: Stylon Wang <[email protected]>
Signed-off-by: Austin Zheng <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-06-15 10:44:49 -04:00
Tom Rix 94344e62a9 drm/amd/display: remove unused variable oldest_index
cpp_check reports
drivers/gpu/drm/amd/display/modules/freesync/freesync.c:1143:17: style: Variable
  'oldest_index' is assigned a value that is never used. [unreadVariable]
   oldest_index = 0;
                ^

This variable is not used so remove.

Signed-off-by: Tom Rix <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-04-18 16:28:54 -04:00
Tom Rix 583da1b82a drm/amd/display: remove unused average_render_time_in_us and i variables
clang with W=1 reports
drivers/gpu/drm/amd/amdgpu/../display/modules/freesync/freesync.c:1132:15: error: variable
  'average_render_time_in_us' set but not used [-Werror,-Wunused-but-set-variable]
        unsigned int average_render_time_in_us = 0;
                     ^
This variable is not used so remove it, which caused i to be unused so remove that as well.

Signed-off-by: Tom Rix <[email protected]>
Signed-off-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-04-11 18:03:22 -04:00
Aric Cyr 627441f5a5 Revert "drm/amd/display: Fix FreeSync active bit issue"
This reverts commit 6cfb6df2d6.

[Why & How]
Original change causes black screen. Revert
until fix is available.

Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-02-28 14:30:00 -05:00
Leo (Hanghong) Ma 6cfb6df2d6 drm/amd/display: Fix FreeSync active bit issue
[Why]
The FreeSync active bit unconditionally set in HDMI VSIF.

[How]
Set this bit to true when FAMS is enable on desktop.

Reviewed-by: Felipe Clark <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Leo (Hanghong) Ma <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-02-14 16:06:10 -05:00
Dillon Varone 689008e11f drm/amd/display: set active bit for desktop with VSDBv3
When using freesync on desktop, need to set freesync active bit for AMD
VSDBv3 infopacket.

Tested-by: Daniel Wheeler <[email protected]>
Reviewed-by: Martin Leung <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Dillon Varone <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-01-17 15:39:58 -05:00
Rodrigo Siqueira 2eb82aaa58 drm/amd/display: Remove unused code
Remove some code that is never used from freesync file.

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2023-01-17 15:39:50 -05:00
Mike Hsieh 52b5432cd7 drm/amd/display: Set correct EOTF and Gamut flag in VRR info
[Why] FreeSync always use G2.2 EOTF and Native gamut
[How] Set EOTF and Gamut flags accordingly

Reviewed-by: Krunoslav Kovac <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Mike Hsieh <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-11-09 17:41:41 -05:00
Leo Ma 0591183699 drm/amd/display: Fix HDMI VSIF V3 incorrect issue
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Leo Ma <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-08-10 15:12:13 -04:00
Harry Wentland 09de5cd2c1 drm/amd/display: Move all linux includes into OS types
Move all linux includes into OS types.

Acked-by: Alan Liu <[email protected]>
Signed-off-by: Harry Wentland <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-07-05 16:16:49 -04:00
Harry VanZyllDeJong ebfb15262a drm/amd/display: Add vrr_active_variable to dc_stream_update
[WHY]
The display driver on some OSes need to track it in order to
perform memory clock switching decisions.

[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.

Acked-by: Alan Liu <[email protected]>
Signed-off-by: Harry VanZyllDeJong <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-06-14 21:38:41 -04:00
Felipe Clark c2fbe663ec drm/amd/display: Firmware assisted MCLK switch and FS
[WHY]
Memory clock switching has great potential for power savings.

[HOW]
The driver code was modified to notify the DMCUB firmware that it should
stretch the vertical blank of frames when a memory clock switch is about
to start so that no blackouts happen on the screen due to unavailability
of the frame buffer.
The driver logic to determine when such firmware assisted strategy can
be initiated is also implemented and consists on checking prerequisites
of the feature.

Acked-by: Alan Liu <[email protected]>
Signed-off-by: Felipe Clark <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-06-14 21:38:41 -04:00
Angus Wang 19a2e1e36a drm/amd/display: Fix inconsistent timestamp type
[WHY]
An unsigned int timestamp variable is assigned with an unsigned
long long value. Also, the assignment directly converts the
tick value to us without using built-in get elapsed time function.

[HOW]
Cast the assigned value correctly and also use built-in function
to get the timestamp in the unit we want.

v2: squash in 64 bit division fix

Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Pavle Kotarac <[email protected]>
Signed-off-by: Angus Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-04-12 14:19:51 -04:00
Alex Deucher 1754cea176 drm/amd/display: fix 64 bit divide in freesync code
Use div_u64() rather than a a 64 bit divide.

Fixes: 3fe5739db4 ("drm/amd/display: Add flip interval workaround")
Reviewed-by: Nathan Chancellor <[email protected]>
Reported-by: kernel test robot <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: Angus Wang <[email protected]>
Cc: Anthony Koo <[email protected]>
Cc: Aric Cyr <[email protected]>
Cc: Nathan Chancellor <[email protected]>
2022-04-11 13:50:35 -04:00
Lv Ruyi 8d2aad983d drm/amd/dc: remove duplicate include
'dm_services.h' included in 'freesync,c' is duplicated, so remove one.

Reported-by: Zeal Robot <[email protected]>
Signed-off-by: Lv Ruyi <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-04-06 10:20:50 -04:00
Angus Wang 3fe5739db4 drm/amd/display: Add flip interval workaround
[WHY]
Some games experience low FPS issues when FreeSync is on and VSync is
toggled to half refresh rate.

[HOW]
First create a function to determine workaround conditions, which is
when we detect 2 or more VSync interrupts between flips and a very short
VSync to flip interval. We do the workaround during VSync interrupts and
set the v_total_max and min to nominal. We also cleanup after we exit
the game.

Tested-by: Daniel Wheeler <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Angus Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2022-04-05 10:29:47 -04:00
Guo, Bing 33df94e181 drm/amd/display: Get ceiling for v_total calc
Updating certain variable blanking calculations to use ceiling function.

Reviewed-by: Chris Park <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Acked-by: Agustin Gutierrez <[email protected]>
Signed-off-by: Bing Guo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-10-28 14:26:14 -04:00
hvanzyll 4932d17697 drm/amd/display: disable desktop VRR when using older flip model
[WHY]
OS uses older flip model which does not work with desktop
VRR causing memory allocations at the wrong IRQ level.

[HOW]
Checks added to flip model to verify model is 2.2 or greater when
doing any of the desktop VRR checks for full updates. This
prevents full updates when VRR changes until a mode change.

Signed-off-by: Harry VanZyllDeJong <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-05-27 12:24:34 -04:00
Harry VanZyllDeJong 0774e08adf drm/amd/display: Fixed corruption on 4K tvs
[WHY]
When on the desktop freesync is not enabled,
doing a frame stretch causes the TV to display
undesired output.

[HOW]
By changing the logic so that when ever fresync
is supported the TV is notified we are in fressync
instead on a non fresync state.

Signed-off-by: Harry VanZyllDeJong <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Anthony Koo <[email protected]>
Acked-by: Jun Lei <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-04-09 16:53:24 -04:00
Alvin Lee 49c70ece54 drm/amd/display: Change input parameter for set_drr
[Why]
Change set_drr to pass in the entire dc_crtc_timing_adjust
structure instead of passing in the parameters individually.
This is to more easily pass in required parameters in the
adjust structure when it gets updated.

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Solomon Chiu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-04-09 16:41:36 -04:00
Max.Tseng 4cda3243ec drm/amd/display: Add flag for building infopacket
[why]
Add flag to build infopacket in SDP v1.3 format

Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Max.Tseng <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2021-03-02 14:06:29 -05:00
AMD\ramini 983bcb4cbe drm/amd/display: Set FixRate bit in VSIF V3
[Why]
Signal FreeSync display that we are in Fixed Rate mode, and
expand the FreeSync range to 1024.

[How]
Set the new bit in SB16:bit0, and augment the min and max
refresh rate with 2 extra bits.

Signed-off-by: AMD\ramini <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Eryk Brol <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-12-08 23:03:04 -05:00
Reza Amini 9bc4162665 drm/amd/display: Implement VSIF V3 extended refresh rate feature
[Why]
Implement feature of VSIF V3

[How]
Set refresh rate MSB for extended range

Signed-off-by: Reza Amini <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Eryk Brol <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-12-08 23:02:57 -05:00
Aric Cyr 5dff371a73 drm/amd/display: FreeSync not active near lower bound of non-LFC monitor range
[Why]
On narrow range monitors without LFC, a margin prevents good utilization
of the available range.

[How]
Decrease the margin for exiting fixed mode and fix the frame counter to
reset if a non-consecutive render is found.

Signed-off-by: Aric Cyr <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Eryk Brol <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-10-05 15:17:05 -04:00
Felipe fe984cb3dd drm/amd/display: Fixed comments (uniform style)
[WHY]
This change was implemented because the comment style was not uniform
across the file. In some lines comments were initiated with // and in
others they were in between /* ... */.
Additionally, the style for multi-line comments was also not uniform and
some comment lines were missing the space between the opening /* and the
first word of the comment.

[HOW]
All comments are now in between /*.../*, multi line comments also use
/*...*/ and for every comment there is now a space between the opening
/* and the first word of the comment.

Signed-off-by: Felipe <[email protected]>
Acked-by: Eryk Brol <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-10-05 15:16:20 -04:00
Anthony Koo e4ed4dbbc8 drm/amd/display: Fix LFC multiplier changing erratically
[Why]
1. There is a calculation that is using frame_time_in_us instead of
last_render_time_in_us to calculate whether choosing an LFC multiplier
would cause the inserted frame duration to be outside of range.

2. We do not handle unsigned integer subtraction correctly and it underflows
to a really large value, which causes some logic errors.

[How]
1. Fix logic to calculate 'within range' using last_render_time_in_us
2. Split out delta_from_mid_point_delta_in_us calculation to ensure
we don't underflow and wrap around

Signed-off-by: Anthony Koo <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-08-10 18:08:53 -04:00
Reza Amini 471c1dd954 drm/amd/display: Allow asic specific FSFT timing optimization
[Why]
Each asic can optimize best based on its capabilities

[How]
Optimizing timing for a new pixel clock

Signed-off-by: Reza Amini <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Eryk Brol <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-08-06 16:40:18 -04:00
Reza Amini 831010da1b drm/amd/display: Implement AMD VSIF V3
[Why]
To support V3

[How]
Generate new VSIF for V3

Signed-off-by: Reza Amini <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
2020-07-21 15:37:39 -04:00