mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
synced 2026-10-29 05:12:59 +01:00
x86/fpu: Mask out the invalid MXCSR bits properly
This is a fix for the fix (yeah, /facepalm).
The correct mask to use is not the negation of the MXCSR_MASK but the
actual mask which contains the supported bits in the MXCSR register.
Reported and debugged by Ville Syrjälä <[email protected]>
Fixes: d298b03506 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
Signed-off-by: Borislav Petkov <[email protected]>
Tested-by: Ville Syrjälä <[email protected]>
Tested-by: Ser Olmy <[email protected]>
Cc: <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
This commit is contained in:
1 parent
711885906b
commit
b2381acd3f
1 file changed
+1
-1
@@ -385,7 +385,7 @@ static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
|
||||
return -EINVAL;
|
||||
} else {
|
||||
/* Mask invalid bits out for historical reasons (broken hardware). */
|
||||
fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask;
|
||||
fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
|
||||
}
|
||||
|
||||
/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */
|
||||
|
||||
Reference in new issue
Block a user