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dts: Rename DW APB timer compatible strings

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"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks. Thus, deprecate both
"dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".

Signed-off-by: Dinh Nguyen <[email protected]>
Reviewed-by: Pavel Machek <[email protected]>
Acked-by: Stephen Warren <[email protected]>
CC: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
CC: Arnd Bergmann <[email protected]>
Cc: Olof Johansson <[email protected]>
CC: Jamie Iles <[email protected]>
Cc: John Stultz <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Olof Johansson <[email protected]>

v3:
- Split out a separate that cleans up the timer entries and clock information.
- Clearly states which binding is deprecated in the bindings doc.

v2:
- Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain
  backwards compatibility in the driver.
This commit is contained in:
Dinh Nguyen authored and Olof Johansson committed 2013-08-29 12:59:02 -07:00
1 parent 13960b47dc
commit 620f5e1cbf
2 files changed
+15 -27
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Documentation/devicetree/bindings/rtc/dw-apb.txt
+11 -23
View File
@@ -1,7 +1,10 @@
* Designware APB timer
Required properties:
- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
- compatible: One of:
"snps,dw-apb-timer"
"snps,dw-apb-timer-sp" <DEPRECATED>
"snps,dw-apb-timer-osc" <DEPRECATED>
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: IRQ line for the timer.
@@ -20,25 +23,10 @@ systems may use one.
Example:
timer1: timer@ffc09000 {
compatible = "snps,dw-apb-timer-sp";
interrupts = <0 168 4>;
clock-frequency = <200000000>;
reg = <0xffc09000 0x1000>;
};
timer2: timer@ffd00000 {
compatible = "snps,dw-apb-timer-osc";
interrupts = <0 169 4>;
clock-frequency = <200000000>;
reg = <0xffd00000 0x1000>;
};
timer3: timer@ffe00000 {
compatible = "snps,dw-apb-timer-osc";
interrupts = <0 170 4>;
reg = <0xffe00000 0x1000>;
clocks = <&timer_clk>, <&timer_pclk>;
clock-names = "timer", "pclk";
};
timer@ffe00000 {
compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffe00000 0x1000>;
clocks = <&timer_clk>, <&timer_pclk>;
clock-names = "timer", "pclk";
};
arch/arm/boot/dts/socfpga.dtsi
+4 -4
View File
@@ -476,25 +476,25 @@
};
timer0: timer0@ffc08000 {
compatible = "snps,dw-apb-timer-sp";
compatible = "snps,dw-apb-timer";
interrupts = <0 167 4>;
reg = <0xffc08000 0x1000>;
};
timer1: timer1@ffc09000 {
compatible = "snps,dw-apb-timer-sp";
compatible = "snps,dw-apb-timer";
interrupts = <0 168 4>;
reg = <0xffc09000 0x1000>;
};
timer2: timer2@ffd00000 {
compatible = "snps,dw-apb-timer-osc";
compatible = "snps,dw-apb-timer";
interrupts = <0 169 4>;
reg = <0xffd00000 0x1000>;
};
timer3: timer3@ffd01000 {
compatible = "snps,dw-apb-timer-osc";
compatible = "snps,dw-apb-timer";
interrupts = <0 170 4>;
reg = <0xffd01000 0x1000>;
};