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clk: st: Support for QUADFS inside ClockGenB/C/D/E/F

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The patch supports the 216/432/660 type Quad Frequency Synthesizers
used by ClockGenB/C/D/E/F

QUADFS clock : It includes support for all 216/432/660 type Quad
Frequency Synthesizers : implemented as Fixed Parent / Rate / Gate clock,
with clock rate calculated reading H/w settings done at BOOT.

QuadFS have 4 outputs : chan0 chan1 chan2 chan3

Signed-off-by: Pankaj Dev <[email protected]>
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>
This commit is contained in:
Gabriel FERNANDEZ authored and Mike Turquette committed 2014-03-25 15:59:09 -07:00
1 parent 44993d3840
commit 5f7aa9071e
2 files changed
+1040 -1
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drivers/clk/st/Makefile
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obj-y += clkgen-mux.o clkgen-pll.o
obj-y += clkgen-mux.o clkgen-pll.o clkgen-fsyn.o
drivers/clk/st/clkgen-fsyn.c
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