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net: stmmac: remove SGMII/RGMII/SMII interrupt handling

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Now that the only use for the interrupt is to clear it and increment a
statistic counter (which is not that relevant anymore) remove all this
code and ensure that the interrupt remains disabled to avoid a stuck
interrupt.

dwmac-sun8i still uses this statistic counter, so it is inappropriate
for this patch to remove it.

Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
Tested-by: Maxime Chevallier <[email protected]>
Tested-by: Lad Prabhakar <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jakub Kicinski <[email protected]>
This commit is contained in:
Russell King (Oracle) authored and Jakub Kicinski committed 2025-10-20 17:17:14 -07:00
1 parent 14f74bc6dc
commit 2e2c878a31
4 files changed
+4 -24
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drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+3 -3
View File
@@ -38,10 +38,10 @@
#define GMAC_INT_DISABLE_PCSAN BIT(2) #define GMAC_INT_DISABLE_PCSAN BIT(2)
#define GMAC_INT_DISABLE_PMT BIT(3) #define GMAC_INT_DISABLE_PMT BIT(3)
#define GMAC_INT_DISABLE_TIMESTAMP BIT(9) #define GMAC_INT_DISABLE_TIMESTAMP BIT(9)
#define GMAC_INT_DISABLE_PCS (GMAC_INT_DISABLE_RGMII | \ #define GMAC_INT_DISABLE_PCS (GMAC_INT_DISABLE_PCSLINK | \
GMAC_INT_DISABLE_PCSLINK | \
GMAC_INT_DISABLE_PCSAN) GMAC_INT_DISABLE_PCSAN)
#define GMAC_INT_DEFAULT_MASK (GMAC_INT_DISABLE_TIMESTAMP | \ #define GMAC_INT_DEFAULT_MASK (GMAC_INT_DISABLE_RGMII | \
GMAC_INT_DISABLE_TIMESTAMP | \
GMAC_INT_DISABLE_PCS) GMAC_INT_DISABLE_PCS)
/* PMT Control and Status */ /* PMT Control and Status */
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
-10
View File
@@ -263,13 +263,6 @@ static void dwmac1000_pmt(struct mac_device_info *hw, unsigned long mode)
writel(pmt, ioaddr + GMAC_PMT); writel(pmt, ioaddr + GMAC_PMT);
} }
/* RGMII or SMII interface */
static void dwmac1000_rgsmii(void __iomem *ioaddr, struct stmmac_extra_stats *x)
{
readl(ioaddr + GMAC_RGSMIIIS);
x->irq_rgmii_n++;
}
static int dwmac1000_irq_status(struct mac_device_info *hw, static int dwmac1000_irq_status(struct mac_device_info *hw,
struct stmmac_extra_stats *x) struct stmmac_extra_stats *x)
{ {
@@ -311,9 +304,6 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
if (intr_status & PCS_RGSMIIIS_IRQ)
dwmac1000_rgsmii(ioaddr, x);
return ret; return ret;
} }
drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+1 -2
View File
@@ -106,8 +106,7 @@
#define GMAC_INT_LPI_EN BIT(5) #define GMAC_INT_LPI_EN BIT(5)
#define GMAC_INT_TSIE BIT(12) #define GMAC_INT_TSIE BIT(12)
#define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \ #define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE)
GMAC_INT_PCS_ANE)
#define GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN | \ #define GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN | \
GMAC_INT_TSIE) GMAC_INT_TSIE)
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
-9
View File
@@ -589,13 +589,6 @@ static void dwmac4_ctrl_ane(struct stmmac_priv *priv, bool ane, bool srgmi_ral,
dwmac_ctrl_ane(priv->ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback); dwmac_ctrl_ane(priv->ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
} }
/* RGMII or SMII interface */
static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x)
{
readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
x->irq_rgmii_n++;
}
static int dwmac4_irq_mtl_status(struct stmmac_priv *priv, static int dwmac4_irq_mtl_status(struct stmmac_priv *priv,
struct mac_device_info *hw, u32 chan) struct mac_device_info *hw, u32 chan)
{ {
@@ -667,8 +660,6 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
} }
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
if (intr_status & PCS_RGSMIIIS_IRQ)
dwmac4_phystatus(ioaddr, x);
return ret; return ret;
} }