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MIPS: ralink: Define PCI_IOBASE

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PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
required by generic PCI drivers to make memory mapped I/O range
work. Hence define it for ralink architectures to be able to
avoid parsing manually IO ranges in PCI generic driver code.
Function 'plat_mem_setup' for ralink is using 'set_io_port_base'
call using '0xa0000000' as address, so use the same address in
the definition to align things.

Acked-by: Thomas Bogendoerfer <[email protected]>
Signed-off-by: Sergio Paracuellos <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Sergio Paracuellos authored and Greg Kroah-Hartman committed 2021-06-15 15:24:29 +02:00
1 parent e0878ad499
commit 222b27713d
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arch/mips/include/asm/mach-ralink/spaces.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_MACH_RALINK_SPACES_H_
#define __ASM_MACH_RALINK_SPACES_H_
#define PCI_IOBASE _AC(0xa0000000, UL)
#define PCI_IOSIZE SZ_16M
#define IO_SPACE_LIMIT (PCI_IOSIZE - 1)
#include <asm/mach-generic/spaces.h>
#endif