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platform/x86/amd/pmc: Add PMC driver support for AMD 1Ah M80H SoC

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The 1Ah M80H SoC uses a different set of SMU mailbox register offsets
compared to the existing 1Ah variants: message at 0xA10, argument at
0xA18, and response at 0xA14.

Add amd_1ah_m80_cpu_info with these offsets, wire it into the PCI ID
table via PCI_DEVICE_DATA(), populate scratch_reg field with
AMD_PMC_SCRATCH_REG_1AH and add the corresponding ACPI ID AMDI000C.

Reviewed-by: Mario Limonciello (AMD) <[email protected]>
Co-developed-by: Sanket Goswami <[email protected]>
Signed-off-by: Sanket Goswami <[email protected]>
Signed-off-by: Shyam Sundar S K <[email protected]>
Link: https://patch.msgid.link/[email protected]
Reviewed-by: Ilpo Järvinen <[email protected]>
Signed-off-by: Ilpo Järvinen <[email protected]>
This commit is contained in:
Shyam Sundar S K authored and Ilpo Järvinen committed 2026-06-10 14:14:26 +03:00
1 parent c3a2521bcc
commit 043af31c8d
2 files changed
+18
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drivers/platform/x86/amd/pmc/pmc.c
+12
View File
@@ -154,6 +154,16 @@ static const struct amd_pmc_cpu_info amd_1ah_m70_cpu_info = {
.os_hint = MSG_OS_HINT_RN,
};
static const struct amd_pmc_cpu_info amd_1ah_m80_cpu_info = {
.smu_msg = AMD_PMC_REGISTER_MSG_1AH_80H,
.smu_arg = AMD_PMC_REGISTER_ARG_1AH_80H,
.smu_rsp = AMD_PMC_REGISTER_RSP_1AH_80H,
.num_ips = ARRAY_SIZE(soc15_ip_blk),
.scratch_reg = AMD_PMC_SCRATCH_REG_1AH,
.ips_ptr = soc15_ip_blk,
.os_hint = MSG_OS_HINT_RN,
};
static const struct pci_device_id pmc_pci_ids[] = {
{ PCI_DEVICE_DATA(AMD, CPU_ID_PCO, &amd_pco_cpu_info) },
{ PCI_DEVICE_DATA(AMD, CPU_ID_CZN, &amd_czn_cpu_info) },
@@ -165,6 +175,7 @@ static const struct pci_device_id pmc_pci_ids[] = {
{ PCI_DEVICE_DATA(AMD, CPU_ID_SHP, NULL) },
{ PCI_DEVICE_DATA(AMD, 1AH_M20H_ROOT, NULL) },
{ PCI_DEVICE_DATA(AMD, 1AH_M60H_ROOT, NULL) },
{ PCI_DEVICE_DATA(AMD, 1AH_M80H_ROOT, &amd_1ah_m80_cpu_info) },
{ }
};
@@ -860,6 +871,7 @@ static const struct acpi_device_id amd_pmc_acpi_ids[] = {
{"AMDI0009", 0},
{"AMDI000A", 0},
{"AMDI000B", 0},
{"AMDI000C", 0},
{"AMD0004", 0},
{"AMD0005", 0},
{ }
drivers/platform/x86/amd/pmc/pmc.h
+6
View File
@@ -22,6 +22,11 @@
/* SMU communication registers for 1Ah 20h SoC */
#define AMD_PMC_REGISTER_MSG_1AH_20H 0x938
/* SMU communication registers for 1Ah 80h SoC */
#define AMD_PMC_REGISTER_MSG_1AH_80H 0xA10
#define AMD_PMC_REGISTER_ARG_1AH_80H 0xA18
#define AMD_PMC_REGISTER_RSP_1AH_80H 0xA14
/* PMC Scratch Registers */
#define AMD_PMC_SCRATCH_REG_CZN 0x94
#define AMD_PMC_SCRATCH_REG_YC 0xD14
@@ -186,6 +191,7 @@ void amd_mp2_stb_deinit(struct amd_pmc_dev *dev);
#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
#define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122
#define PCI_DEVICE_ID_AMD_1AH_M80H_ROOT 0x115b
#define PCI_DEVICE_ID_AMD_MP2_STB 0x172c
int amd_stb_s2d_init(struct amd_pmc_dev *dev);